[llvm] [LV] Move some if-reduction.ll tests to iv-select-cmp.ll (PR #141769)
Ramkumar Ramachandra via llvm-commits
llvm-commits at lists.llvm.org
Wed May 28 07:07:06 PDT 2025
https://github.com/artagnon created https://github.com/llvm/llvm-project/pull/141769
The tests are actually FindFirstIV tests, and having them in if-reduction.ll is misleading.
>From 297aca9909f3e263787f821125c5f8717f65e3f8 Mon Sep 17 00:00:00 2001
From: Ramkumar Ramachandra <r at artagnon.com>
Date: Wed, 28 May 2025 16:03:45 +0200
Subject: [PATCH] [LV] Move some if-reduction.ll tests to iv-select-cmp.ll
The tests are actually FindFirstIV tests, and having them in
if-reduction.ll is misleading.
---
.../Transforms/LoopVectorize/if-reduction.ll | 80 --------
.../Transforms/LoopVectorize/iv-select-cmp.ll | 188 ++++++++++++++++++
2 files changed, 188 insertions(+), 80 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/if-reduction.ll b/llvm/test/Transforms/LoopVectorize/if-reduction.ll
index e6c2242dd0c4e..b4aba5619f1eb 100644
--- a/llvm/test/Transforms/LoopVectorize/if-reduction.ll
+++ b/llvm/test/Transforms/LoopVectorize/if-reduction.ll
@@ -1803,86 +1803,6 @@ for.end: ; preds = %for.body, %entry
ret i32 %1
}
- at table = constant [13 x i16] [i16 10, i16 35, i16 69, i16 147, i16 280, i16 472, i16 682, i16 1013, i16 1559, i16 2544, i16 4553, i16 6494, i16 10000], align 1
-
-define i16 @non_reduction_index(i16 noundef %val) {
-; CHECK-LABEL: define i16 @non_reduction_index(
-; CHECK-SAME: i16 noundef [[VAL:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_COND_CLEANUP:.*]]:
-; CHECK-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
-; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
-; CHECK-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
-; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
-; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
-; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
-;
-entry:
- br label %for.body
-
-for.cond.cleanup: ; preds = %for.body
- %spec.select.lcssa = phi i16 [ %spec.select, %for.body ]
- ret i16 %spec.select.lcssa
-
-for.body: ; preds = %entry, %for.body
- %i.05 = phi i16 [ 12, %entry ], [ %sub, %for.body ]
- %k.04 = phi i16 [ 0, %entry ], [ %spec.select, %for.body ]
- %arrayidx = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 %i.05
- %0 = load i16, ptr %arrayidx, align 1
- %cmp1 = icmp ugt i16 %0, %val
- %sub = add nsw i16 %i.05, -1
- %spec.select = select i1 %cmp1, i16 %sub, i16 %k.04
- %cmp.not = icmp eq i16 %sub, 0
- br i1 %cmp.not, label %for.cond.cleanup, label %for.body
-}
-
- at tablef = constant [13 x half] [half 10.0, half 35.0, half 69.0, half 147.0, half 280.0, half 472.0, half 682.0, half 1013.0, half 1559.0, half 2544.0, half 4556.0, half 6496.0, half 10000.0], align 1
-
-define i16 @non_reduction_index_half(half noundef %val) {
-; CHECK-LABEL: define i16 @non_reduction_index_half(
-; CHECK-SAME: half noundef [[VAL:%.*]]) {
-; CHECK-NEXT: [[ENTRY:.*]]:
-; CHECK-NEXT: br label %[[FOR_BODY:.*]]
-; CHECK: [[FOR_COND_CLEANUP:.*]]:
-; CHECK-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
-; CHECK: [[FOR_BODY]]:
-; CHECK-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
-; CHECK-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
-; CHECK-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
-; CHECK-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
-; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
-; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
-; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
-;
-entry:
- br label %for.body
-
-for.cond.cleanup: ; preds = %for.body
- %spec.select.lcssa = phi i16 [ %spec.select, %for.body ]
- ret i16 %spec.select.lcssa
-
-for.body: ; preds = %entry, %for.body
- %i.05 = phi i16 [ 12, %entry ], [ %sub, %for.body ]
- %k.04 = phi i16 [ 0, %entry ], [ %spec.select, %for.body ]
- %arrayidx = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 %i.05
- %0 = load half, ptr %arrayidx, align 1
- %fcmp1 = fcmp ugt half %0, %val
- %sub = add nsw i16 %i.05, -1
- %spec.select = select i1 %fcmp1, i16 %sub, i16 %k.04
- %cmp.not = icmp eq i16 %sub, 0
- br i1 %cmp.not, label %for.cond.cleanup, label %for.body
-}
-
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll b/llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
index 1521f9502879c..70ca6fac97569 100644
--- a/llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
+++ b/llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
@@ -1829,6 +1829,194 @@ exit: ; preds = %for.body
ret i64 %spec.select
}
+ at table = constant [13 x i16] [i16 10, i16 35, i16 69, i16 147, i16 280, i16 472, i16 682, i16 1013, i16 1559, i16 2544, i16 4553, i16 6494, i16 10000], align 1
+
+define i16 @not_vectorized_select_decreasing_induction_icmp_table_i16(i16 noundef %val) {
+; CHECK-LABEL: define i16 @non_reduction_index(
+; CHECK-SAME: i16 noundef [[VAL:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
+; CHECK-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
+; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
+; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
+; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+; CHECK-VF4IC1-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_i16(
+; CHECK-VF4IC1-SAME: i16 noundef [[VAL:%.*]]) {
+; CHECK-VF4IC1-NEXT: [[ENTRY:.*]]:
+; CHECK-VF4IC1-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4IC1: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-VF4IC1-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4IC1-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
+; CHECK-VF4IC1: [[FOR_BODY]]:
+; CHECK-VF4IC1-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4IC1-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
+; CHECK-VF4IC1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
+; CHECK-VF4IC1-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
+; CHECK-VF4IC1-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
+; CHECK-VF4IC1-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
+; CHECK-VF4IC1-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
+; CHECK-VF4IC1-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
+; CHECK-VF4IC1-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+; CHECK-VF4IC4-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_i16(
+; CHECK-VF4IC4-SAME: i16 noundef [[VAL:%.*]]) {
+; CHECK-VF4IC4-NEXT: [[ENTRY:.*]]:
+; CHECK-VF4IC4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4IC4: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-VF4IC4-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4IC4-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
+; CHECK-VF4IC4: [[FOR_BODY]]:
+; CHECK-VF4IC4-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4IC4-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
+; CHECK-VF4IC4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
+; CHECK-VF4IC4-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
+; CHECK-VF4IC4-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
+; CHECK-VF4IC4-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
+; CHECK-VF4IC4-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
+; CHECK-VF4IC4-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
+; CHECK-VF4IC4-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+; CHECK-VF1IC4-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_i16(
+; CHECK-VF1IC4-SAME: i16 noundef [[VAL:%.*]]) {
+; CHECK-VF1IC4-NEXT: [[ENTRY:.*]]:
+; CHECK-VF1IC4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF1IC4: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-VF1IC4-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF1IC4-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
+; CHECK-VF1IC4: [[FOR_BODY]]:
+; CHECK-VF1IC4-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF1IC4-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
+; CHECK-VF1IC4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
+; CHECK-VF1IC4-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
+; CHECK-VF1IC4-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
+; CHECK-VF1IC4-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
+; CHECK-VF1IC4-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
+; CHECK-VF1IC4-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
+; CHECK-VF1IC4-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+entry:
+ br label %for.body
+
+for.cond.cleanup: ; preds = %for.body
+ %spec.select.lcssa = phi i16 [ %spec.select, %for.body ]
+ ret i16 %spec.select.lcssa
+
+for.body: ; preds = %entry, %for.body
+ %i.05 = phi i16 [ 12, %entry ], [ %sub, %for.body ]
+ %k.04 = phi i16 [ 0, %entry ], [ %spec.select, %for.body ]
+ %arrayidx = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 %i.05
+ %0 = load i16, ptr %arrayidx, align 1
+ %cmp1 = icmp ugt i16 %0, %val
+ %sub = add nsw i16 %i.05, -1
+ %spec.select = select i1 %cmp1, i16 %sub, i16 %k.04
+ %cmp.not = icmp eq i16 %sub, 0
+ br i1 %cmp.not, label %for.cond.cleanup, label %for.body
+}
+
+ at tablef = constant [13 x half] [half 10.0, half 35.0, half 69.0, half 147.0, half 280.0, half 472.0, half 682.0, half 1013.0, half 1559.0, half 2544.0, half 4556.0, half 6496.0, half 10000.0], align 1
+
+define i16 @not_vectorized_select_decreasing_induction_icmp_table_half(half noundef %val) {
+; CHECK-LABEL: define i16 @non_reduction_index_half(
+; CHECK-SAME: half noundef [[VAL:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
+; CHECK-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
+; CHECK-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
+; CHECK-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
+; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
+; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
+; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+; CHECK-VF4IC1-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_half(
+; CHECK-VF4IC1-SAME: half noundef [[VAL:%.*]]) {
+; CHECK-VF4IC1-NEXT: [[ENTRY:.*]]:
+; CHECK-VF4IC1-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4IC1: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-VF4IC1-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4IC1-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
+; CHECK-VF4IC1: [[FOR_BODY]]:
+; CHECK-VF4IC1-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4IC1-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
+; CHECK-VF4IC1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
+; CHECK-VF4IC1-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
+; CHECK-VF4IC1-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
+; CHECK-VF4IC1-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
+; CHECK-VF4IC1-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
+; CHECK-VF4IC1-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
+; CHECK-VF4IC1-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+; CHECK-VF4IC4-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_half(
+; CHECK-VF4IC4-SAME: half noundef [[VAL:%.*]]) {
+; CHECK-VF4IC4-NEXT: [[ENTRY:.*]]:
+; CHECK-VF4IC4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF4IC4: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-VF4IC4-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4IC4-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
+; CHECK-VF4IC4: [[FOR_BODY]]:
+; CHECK-VF4IC4-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF4IC4-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
+; CHECK-VF4IC4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
+; CHECK-VF4IC4-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
+; CHECK-VF4IC4-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
+; CHECK-VF4IC4-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
+; CHECK-VF4IC4-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
+; CHECK-VF4IC4-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
+; CHECK-VF4IC4-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+; CHECK-VF1IC4-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_half(
+; CHECK-VF1IC4-SAME: half noundef [[VAL:%.*]]) {
+; CHECK-VF1IC4-NEXT: [[ENTRY:.*]]:
+; CHECK-VF1IC4-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK-VF1IC4: [[FOR_COND_CLEANUP:.*]]:
+; CHECK-VF1IC4-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF1IC4-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
+; CHECK-VF1IC4: [[FOR_BODY]]:
+; CHECK-VF1IC4-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
+; CHECK-VF1IC4-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
+; CHECK-VF1IC4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
+; CHECK-VF1IC4-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
+; CHECK-VF1IC4-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
+; CHECK-VF1IC4-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
+; CHECK-VF1IC4-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
+; CHECK-VF1IC4-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
+; CHECK-VF1IC4-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+entry:
+ br label %for.body
+
+for.cond.cleanup: ; preds = %for.body
+ %spec.select.lcssa = phi i16 [ %spec.select, %for.body ]
+ ret i16 %spec.select.lcssa
+
+for.body: ; preds = %entry, %for.body
+ %i.05 = phi i16 [ 12, %entry ], [ %sub, %for.body ]
+ %k.04 = phi i16 [ 0, %entry ], [ %spec.select, %for.body ]
+ %arrayidx = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 %i.05
+ %0 = load half, ptr %arrayidx, align 1
+ %fcmp1 = fcmp ugt half %0, %val
+ %sub = add nsw i16 %i.05, -1
+ %spec.select = select i1 %fcmp1, i16 %sub, i16 %k.04
+ %cmp.not = icmp eq i16 %sub, 0
+ br i1 %cmp.not, label %for.cond.cleanup, label %for.body
+}
+
define i64 @not_vectorized_select_decreasing_induction_icmp_non_const_start(ptr %a, ptr %b, i64 %rdx.start, i64 %n) {
; CHECK-VF4IC1-LABEL: define i64 @not_vectorized_select_decreasing_induction_icmp_non_const_start(
; CHECK-VF4IC1-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[RDX_START:%.*]], i64 [[N:%.*]]) {
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