[llvm] [AArch64] Handle XAR with v1i64 operand types (PR #141754)
Cullen Rhodes via llvm-commits
llvm-commits at lists.llvm.org
Wed May 28 06:18:43 PDT 2025
================
@@ -4637,15 +4637,39 @@ bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) {
if (!IsXOROperand) {
SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i64);
- SDNode *MOV = CurDAG->getMachineNode(AArch64::MOVIv2d_ns, DL, VT, Zero);
+ SDNode *MOV =
+ CurDAG->getMachineNode(AArch64::MOVIv2d_ns, DL, MVT::v2i64, Zero);
SDValue MOVIV = SDValue(MOV, 0);
R1 = N1->getOperand(0);
R2 = MOVIV;
}
+ // If the input is a v1i64, widen to a v2i64 to use XAR.
+ assert((VT == MVT::v1i64 || VT == MVT::v2i64) && "Unexpected XAR type!");
+ if (VT == MVT::v1i64) {
+ EVT SVT = MVT::v2i64;
+ SDValue Undef =
+ SDValue(CurDAG->getMachineNode(AArch64::IMPLICIT_DEF, DL, SVT), 0);
+ SDValue DSub = CurDAG->getTargetConstant(AArch64::dsub, DL, MVT::i32);
+ R1 = SDValue(CurDAG->getMachineNode(AArch64::INSERT_SUBREG, DL, SVT, Undef,
+ R1, DSub),
+ 0);
+ if (R2.getValueType() == MVT::v1i64)
+ R2 = SDValue(CurDAG->getMachineNode(AArch64::INSERT_SUBREG, DL, SVT,
+ Undef, R2, DSub),
+ 0);
+ }
+
SDValue Ops[] = {R1, R2, Imm};
- CurDAG->SelectNodeTo(N, AArch64::XAR, N0.getValueType(), Ops);
+ SDNode *XAR =
+ CurDAG->getMachineNode(AArch64::XAR, DL, R1.getValueType(), Ops);
----------------
c-rhodes wrote:
nit: if it can only be this value type personally I'd find it clearer if it just used it to save me the uncertainty
```suggestion
CurDAG->getMachineNode(AArch64::XAR, DL, MVT::v2i64, Ops);
```
https://github.com/llvm/llvm-project/pull/141754
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