[llvm] [AArch64][SME] Simplify initialization of the TPIDR2 block (PR #141049)

[Benjamin Maxwell via llvm-commits]

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@@ -3231,20 +3231,24 @@ AArch64TargetLowering::EmitInitTPIDR2Object(MachineInstr &MI,
   TPIDR2Object &TPIDR2 = FuncInfo->getTPIDR2Obj();
   if (TPIDR2.Uses > 0) {
     const TargetInstrInfo *TII = Subtarget->getInstrInfo();
-    // Store the buffer pointer to the TPIDR2 stack object.
-    BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::STRXui))
+    unsigned TPIDInitSaveSlicesReg = MI.getOperand(1).getReg();
+    if (!Subtarget->isLittleEndian()) {
+      unsigned TmpReg =
+          MF->getRegInfo().createVirtualRegister(&AArch64::GPR64RegClass);
+      // For big-endian targets move "num_za_save_slices" to the top two bytes.
+      BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::UBFMXri), TmpReg)
+          .addReg(TPIDInitSaveSlicesReg)
+          .addImm(16)
+          .addImm(15);
+      TPIDInitSaveSlicesReg = TmpReg;
+    }
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MacDue wrote:

What's the status of big-endian support? It's not super clear to me (as we have some support for big-endian SVE, IIRC).

https://github.com/llvm/llvm-project/pull/141049