[llvm] AArch64: Clear hasSideEffects on AUT and AUTPAC. (PR #141330)

[Peter Collingbourne via llvm-commits]

pcc wrote:

> I feel I would expect these instructions to have side-effects, especially with FPAC. Can you give more details about what kind of optimization this enables and why it is safe? I guess you mean that we do not expect the exception to occur, and if it does it does not matter where it happens, only that it does?

The kinds of optimizations that I was seeing was things like merging LDR/LDR into LDP if it happened to cross the AUT boundary. I'll see if I can show you an example tomorrow.

In general we only need this exception to happen in case of a use (and it needs to happen before the use by construction) and as you mention it doesn't really matter when it happens relative to the other instructions. This (exception only guaranteed if used) is already the case at the IR level (IntrNoMem allows the intrinsic to be dropped without a use), this just extends the same idea to the backend.

https://github.com/llvm/llvm-project/pull/141330