[llvm] [InstCombine] Combine or-disjoint (and->mul), (and->mul) to and->mul (PR #136013)

[Jeffrey Byrnes via llvm-commits]

jrbyrnes wrote:

We may have case where the select APInts have different bitwidths than the mask. This case was unhandled and causing assertion failures.

We can likely improve `matchBitmaskMul` to handle this case, however since this isn't the base case I will leave this as possible extension.

https://github.com/llvm/llvm-project/pull/136013