[llvm] [AMDGPU] Compute GISel KnownBits for S_BFE instructions (PR #141588)

[Jay Foad via llvm-commits]

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@@ -16502,12 +16502,59 @@ static void knownBitsForWorkitemID(const GCNSubtarget &ST,
   Known.Zero.setHighBits(llvm::countl_zero(MaxValue));
 }
 
+static void knownBitsForSBFE(const MachineInstr &MI, GISelValueTracking &VT,
+                             KnownBits &Known, const APInt &DemandedElts,
+                             unsigned BFEWidth, bool SExt) {
+  const MachineRegisterInfo &MRI = VT.getMachineFunction().getRegInfo();
+  const MachineOperand &Src1 = MI.getOperand(2);
+
+  unsigned Src1Cst = 0;
+  if (Src1.isImm())
+    Src1Cst = Src1.getImm();
+  else if (Src1.isReg()) {
+    auto Cst = getIConstantVRegValWithLookThrough(Src1.getReg(), MRI);
+    if (!Cst)
+      return;
+    Src1Cst = Cst->Value.getZExtValue();
+  } else
+    return;
+
+  const unsigned Mask = maskTrailingOnes<unsigned>(6);
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jayfoad wrote:

Really this should be 5 or 6 depending on `BFEWidth`. Otherwise your `.lshr` calls below could fail an assertion, if `BFEWidth` is 32 and `Offset` >= 32.

https://github.com/llvm/llvm-project/pull/141588