[llvm] [AMDGPU][NFCI] Add IEEEMinimumMaximumInsts SubtargetFeature (PR #141081)

[Jay Foad via llvm-commits]

================
@@ -143,6 +143,12 @@ def FeatureFmaMixInsts : SubtargetFeature<"fma-mix-insts",
   "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions"
 >;
 
+def FeatureIEEEMinimumMaximumInsts : SubtargetFeature<"ieee-minimum-maximum-insts",
+  "HasIEEEMinimumMaximumInsts",
+  "true",
+  "Has v_minimum/maximum_f16/f32/f64 and v_pk_minimum/maximum_f16 instructions"
----------------
jayfoad wrote:

gfx950 doesn't have any of these instructions, does it? At least I don't see any MC tests for them.

https://github.com/llvm/llvm-project/pull/141081