[llvm] [LoongArch] Fix assertion failure in performORCombine (PR #141586)

[via llvm-commits]

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@@ -4410,7 +4410,7 @@ static SDValue performORCombine(SDNode *N, SelectionDAG &DAG,
     LLVM_DEBUG(dbgs() << "Perform OR combine: match pattern 5\n");
     return DAG.getNode(
         LoongArchISD::BSTRINS, DL, ValTy, N0.getOperand(0),
-        DAG.getConstant(CN1->getSExtValue() >> MaskIdx0, DL, ValTy),
+        DAG.getSignedConstant(CN1->getSExtValue() >> MaskIdx0, DL, ValTy),
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heiher wrote:

Perhaps. I haven't found any others so far, but if I do, I might fix them in this PR or in a follow-up.

https://github.com/llvm/llvm-project/pull/141586