[llvm] [AMDGPU] Support bottom-up postRA scheduing. (PR #135295)

[Harrison Hao via llvm-commits]

================
@@ -417,7 +450,41 @@ void GCNHazardRecognizer::AdvanceCycle() {
 }
 
 void GCNHazardRecognizer::RecedeCycle() {
-  llvm_unreachable("hazard recognizer does not support bottom-up scheduling.");
+  // If no instruction was issued this cycle, pop the oldest placeholder.
+  if (!CurrCycleInstr) {
+    if (!EmittedInstrs.empty())
+      EmittedInstrs.pop_back();
+    return;
+  }
+
+  // If this is a bundle header, handle the entire bundle here.
+  if (CurrCycleInstr->isBundle()) {
+    processBundleBottomUp();
+    return;
+  }
+
+  unsigned NumWaitStates = TII.getNumWaitStates(*CurrCycleInstr);
+  if (!NumWaitStates) {
+    CurrCycleInstr = nullptr;
+    return;
+  }
+
+  // Add current instruction to the emitted list.
+  EmittedInstrs.push_back(CurrCycleInstr);
----------------
harrisonGPU wrote:

Thanks a lot—I really appreciate the feedback! :-)
I understand your concerns and agree with your point of view.
I was comparing it with AdvanceCycle() and misunderstood the difference, but I’ve now updated the patch: bottom‑up scheduling on GFX11+ skips the hazard recognizer, so maintaining EmittedInstrs is no longer necessary.
Thanks again for pointing this out !!

https://github.com/llvm/llvm-project/pull/135295