[llvm] Use getSignedTargetConstant for offset (PR #141149)

[Shimin Cui via llvm-commits]

https://github.com/scui-ibm updated https://github.com/llvm/llvm-project/pull/141149

>From ca6d08b908ad17435d1287377ba6905b3ab6ab66 Mon Sep 17 00:00:00 2001
From: Shimin Cui <scui at ca.ibm.com>
Date: Thu, 22 May 2025 18:06:23 -0400
Subject: [PATCH 1/2] Use getSignedTargetConstant for offset

---
 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp |  4 +--
 llvm/test/CodeGen/PowerPC/signed-offset.ll  | 33 +++++++++++++++++++++
 2 files changed, 35 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/CodeGen/PowerPC/signed-offset.ll

diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 7147506bbd89b..f921032356d65 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -7858,8 +7858,8 @@ void PPCDAGToDAGISel::PeepholePPC64() {
         if (!isInt<16>(Offset))
           continue;
 
-        ImmOpnd = CurDAG->getTargetConstant(Offset, SDLoc(ImmOpnd),
-                                            ImmOpnd.getValueType());
+        ImmOpnd = CurDAG->getSignedTargetConstant(Offset, SDLoc(ImmOpnd),
+                                                  ImmOpnd.getValueType());
       } else if (Offset != 0) {
         // This optimization is performed for non-TOC-based local-[exec|dynamic]
         // accesses.
diff --git a/llvm/test/CodeGen/PowerPC/signed-offset.ll b/llvm/test/CodeGen/PowerPC/signed-offset.ll
new file mode 100644
index 0000000000000..d12f99ead644b
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/signed-offset.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -verify-machineinstrs < %s -mcpu=ppc -mtriple powerpc-ibm-aix-xcoff | FileCheck %s
+
+%_type = type <{ [90112 x i8] }>
+
+ at g = external global %_type
+
+define void @foo(ptr %p) {
+; CHECK-LABEL: foo:
+; CHECK:     	 stfd 31, 0(31)
+; CHECK-NEXT:    lwz 3, -32(30)
+; CHECK-NEXT:    lwz 4, -28(30)
+; CHECK-NEXT:    cmplwi 3, 0
+; CHECK-NEXT:    cmpwi 1, 3, 0
+; CHECK-NEXT:    crandc 20, 5, 2
+; CHECK-NEXT:    cmpwi 1, 4, 0
+entry:
+  %0 = load double, ptr getelementptr inbounds nuw (i8, ptr @g, i32 83272), align 8
+  %1 = call i32 @bar(ptr getelementptr inbounds nuw (i8, ptr @g, i32 83272))
+  %2 = call i32 @bar(ptr getelementptr inbounds nuw (i8, ptr @g, i32 83240))
+  store double %0, ptr %p, align 8
+  %3 = load i64, ptr getelementptr inbounds nuw (i8, ptr @g, i32 83240), align 8
+  %4 = icmp slt i64 %3, 1
+  br i1 %4, label %then, label %else
+
+then:                                                     ; preds = %entry
+  ret void
+
+else:                                                     ; preds = %entry
+  ret void
+}
+
+declare signext i32 @bar(ptr)

>From e83515698581b3f75d316bf0d8afdfa8c7e57427 Mon Sep 17 00:00:00 2001
From: Shimin Cui <scui at ca.ibm.com>
Date: Mon, 26 May 2025 09:49:32 -0400
Subject: [PATCH 2/2] Use -ppc-asm-full-reg-names for the test

---
 llvm/test/CodeGen/PowerPC/signed-offset.ll | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/llvm/test/CodeGen/PowerPC/signed-offset.ll b/llvm/test/CodeGen/PowerPC/signed-offset.ll
index d12f99ead644b..ded78e121c096 100644
--- a/llvm/test/CodeGen/PowerPC/signed-offset.ll
+++ b/llvm/test/CodeGen/PowerPC/signed-offset.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -verify-machineinstrs < %s -mcpu=ppc -mtriple powerpc-ibm-aix-xcoff | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mcpu=ppc -mtriple powerpc-ibm-aix-xcoff \
+; RUN:     -ppc-asm-full-reg-names | FileCheck %s
 
 %_type = type <{ [90112 x i8] }>
 
@@ -7,13 +8,13 @@
 
 define void @foo(ptr %p) {
 ; CHECK-LABEL: foo:
-; CHECK:     	 stfd 31, 0(31)
-; CHECK-NEXT:    lwz 3, -32(30)
-; CHECK-NEXT:    lwz 4, -28(30)
-; CHECK-NEXT:    cmplwi 3, 0
-; CHECK-NEXT:    cmpwi 1, 3, 0
-; CHECK-NEXT:    crandc 20, 5, 2
-; CHECK-NEXT:    cmpwi 1, 4, 0
+; CHECK:         stfd f31, 0(r31)
+; CHECK-NEXT:    lwz r3, -32(r30)
+; CHECK-NEXT:    lwz r4, -28(r30)
+; CHECK-NEXT:    cmplwi r3, 0
+; CHECK-NEXT:    cmpwi cr1, r3, 0
+; CHECK-NEXT:    crandc 4*cr5+lt, 4*cr1+gt, eq
+; CHECK-NEXT:    cmpwi cr1, r4, 0
 entry:
   %0 = load double, ptr getelementptr inbounds nuw (i8, ptr @g, i32 83272), align 8
   %1 = call i32 @bar(ptr getelementptr inbounds nuw (i8, ptr @g, i32 83272))