[clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Sun May 11 21:02:48 PDT 2025


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@@ -43,34 +43,43 @@ def WriteAtomicSTD  : SchedWrite;    // Atomic store double word
 def WriteFAdd16     : SchedWrite;    // 16-bit floating point addition/subtraction
 def WriteFAdd32     : SchedWrite;    // 32-bit floating point addition/subtraction
 def WriteFAdd64     : SchedWrite;    // 64-bit floating point addition/subtraction
+def WriteFAdd128    : SchedWrite;    // 128-bit floating point addition/subtraction
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wangpc-pp wrote:

I think we should put schedule things into another seperated PR to simplify this PR.

https://github.com/llvm/llvm-project/pull/139369


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