[llvm] [X86][APX] Fix issues of suppressing APX for relocation (PR #139285)

[Feng Zou via llvm-commits]

================
@@ -79,11 +78,32 @@ static void suppressEGPRRegClass(MachineFunction &MF, MachineInstr &MI,
   MRI->setRegClass(Reg, NewRC);
 }
 
+// Suppress EGPR in operand 0 of uses to avoid APX relocation types emitted. The
+// register in operand 0 of instruction with relocation may be replaced with
+// operand 0 of uses which may be EGPR. That may lead to emit APX relocation
+// types which breaks the backward compatibility with builtin linkers on
+// existing OS. For example, the register in operand 0 of instruction with
+// relocation is used in PHI instruction, and it may be replaced with operand 0
+// of PHI instruction after PHI elimination and Machine Copy Propagation pass.
+static void suppressEGPRRegClassInRegAndUses(MachineRegisterInfo *MRI,
+                                             MachineInstr &MI,
+                                             const X86Subtarget &ST,
+                                             unsigned int OpNum) {
+  suppressEGPRRegClass(MRI, MI, ST, OpNum);
+  Register Reg = MI.getOperand(OpNum).getReg();
+  for (MachineInstr &Use : MRI->use_instructions(Reg)) {
+    const unsigned UseOpNum = 0;
+    if (Use.getOperand(UseOpNum).isReg())
----------------
fzou1 wrote:

The operand which uses the same register is automatically updated when it's set to non-rex2 register class. The IR after Suppress APX for relocation pass:

```
bb.0.alloca_15:
  %29:gr64_norex2 = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @gvar, $noreg :: (load (s64) from got)
…
bb.1.loop.253:
…
  %6:gr64 = PHI %29:gr64_norex2, %bb.0, %9:gr64, %bb.3
…
```
But the register class of operand 0 (%6) in PHI instruction using %29 is gr64. It may replace the operand 0 in MOV64rm instruction with gotpcrel relocation. See the output in the passes:

After Eliminate PHI nodes for register allocation
```
bb.0.alloca_15:
  %29:gr64_norex2 = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @module_mp_fast_sbm_mp_ywgg_, $noreg :: (load (s64) from got)
  %42:gr64 = COPY %29:gr64_norex2

bb.1.loop.253:
  %6:gr64 = COPY killed %42:gr64
```
During Machine Copy Propagation Pass
```
MCP: Replacing $r15                                                             
     with $r16                                                                  
     in renamable $r15 = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @gvar, $noreg :: (load (s64) from got)
     from renamable $r16 = COPY killed renamable $r15                           
MCP: After replacement: renamable $r16 = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @gvar, $noreg :: (load (s64) from got)
```
After Machine Copy Propagation Pass
```
bb.0.alloca_15:
  renamable $r16 = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @module_mp_fast_sbm_mp_ywgg_, $noreg :: (load (s64) from got)
```
So the operand 0 of PHI instruction should be updated to non-rex2 register class, to avoid APX relocation types emitted.

https://github.com/llvm/llvm-project/pull/139285