[llvm] [NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (PR #139292)
Artem Belevich via llvm-commits
llvm-commits at lists.llvm.org
Fri May 9 16:04:23 PDT 2025
================
@@ -1244,16 +1237,9 @@ bool NVPTXDAGToDAGISel::tryLoadVector(SDNode *N) {
NVPTX::LDV_f32_v4, NVPTX::LDV_f64_v4);
break;
case NVPTXISD::LoadV8:
- switch (EltVT.getSimpleVT().SimpleTy) {
- case MVT::i32:
- Opcode = NVPTX::LDV_i32_v8;
- break;
- case MVT::f32:
- Opcode = NVPTX::LDV_f32_v8;
- break;
- default:
- return false;
- }
+ Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, std::nullopt,
+ std::nullopt, NVPTX::LDV_i32_v8, std::nullopt,
+ NVPTX::LDV_f32_v8, std::nullopt);
----------------
Artem-B wrote:
Nit: you could use `{}` instead of `std::nullopt` to make it a bit more concise. Initializer list is also convenient for putting comments inside `{/* no v8i16 */}`
https://github.com/llvm/llvm-project/pull/139292
More information about the llvm-commits
mailing list