[llvm] [NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (PR #139292)
Drew Kersnar via llvm-commits
llvm-commits at lists.llvm.org
Fri May 9 10:27:48 PDT 2025
================
@@ -1502,6 +1542,16 @@ bool NVPTXDAGToDAGISel::tryStoreVector(SDNode *N) {
N2 = N->getOperand(5);
ToTypeWidth = TotalWidth / 4;
break;
+ case NVPTXISD::StoreV8:
+ if (!Subtarget->has256BitMaskedLoadStore())
+ return false;
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dakersnar wrote:
Yes, you're right, it should be an assert. Type legalization shouldn't let anything past that doesn't pass that check.
https://github.com/llvm/llvm-project/pull/139292
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