[llvm] [RISCV] Extend zvqdot matching to handle reduction trees (PR #138965)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Fri May 9 07:24:25 PDT 2025
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@@ -18131,6 +18131,29 @@ static MVT getQDOTXResultType(MVT OpVT) {
return MVT::getVectorVT(MVT::i32, OpEC.divideCoefficientBy(4));
}
+/// Given fixed length vectors A and B with equal element types, but possibly
+/// different number of elements, return A + B where either A or B is zero
+/// padded to the larger number of elements.
+static SDValue getZeroPaddedAdd(const SDLoc &DL, SDValue A, SDValue B,
+ SelectionDAG &DAG) {
+ // NOTE: Manually doing the extract/add/insert scheme produces
+ // significantly better coegen than the naive pad with zeros
+ // and add scheme.
+ EVT AVT = A.getValueType();
+ EVT BVT = B.getValueType();
+ assert(AVT.getVectorElementType() == BVT.getVectorElementType());
+ if (AVT.getVectorNumElements() > BVT.getVectorNumElements()) {
+ std::swap(A, B);
+ std::swap(AVT, BVT);
+ }
+
+ SDValue BPart = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, AVT, B,
+ DAG.getVectorIdxConstant(0, DL));
+ SDValue Res = DAG.getNode(ISD::ADD, DL, AVT, A, BPart);
+ return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, BVT, B, Res,
+ DAG.getVectorIdxConstant(0, DL));
----------------
lukel97 wrote:
Can you use the new DAG.get{Insert,Extract}Subvector utils you added recently here?
https://github.com/llvm/llvm-project/pull/138965
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