[llvm] [RISCV][Peephole] Checking regclass compatibility in VMV (PR #138844)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Fri May 9 01:14:35 PDT 2025


================
@@ -105,3 +105,35 @@ body: |
     %3:vr = COPY %0
 ...
 ---
+name:            diff_regclass
+body:             |
+  bb.0.entry:
+    liveins: $v8
+    ; CHECK-LABEL: name: diff_regclass
+    ; CHECK: liveins: $v8
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[PseudoVMV_V_I_MF2_:%[0-9]+]]:vrnov0 = PseudoVMV_V_I_MF2 $noreg, 0, 0, 5 /* e32 */, 1 /* ta, mu */
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vmv0 = COPY $v8
+    ; CHECK-NEXT: [[PseudoVADD_VV_M1_MASK:%[0-9]+]]:vrnov0 = PseudoVADD_VV_M1_MASK [[PseudoVMV_V_I_MF2_]], $noreg, $noreg, [[COPY]], 0, 5 /* e32 */, 0 /* tu, mu */
+    %0:vr = PseudoVMV_V_I_MF2 $noreg, 0, -1, 5 /* e32 */, 0 /* tu, mu */
+    %1:vrnov0 = PseudoVMV_V_V_MF2 $noreg, %0, 0, 5 /* e32 */, 0 /* tu, mu */
+    %2:vmv0 = COPY $v8
+    %3:vrnov0 = PseudoVADD_VV_M1_MASK %1, $noreg, $noreg, %2, 0, 5 /* e32 */, 0 /* tu, mu */
+...
+---
+name:            diff_regclass_passthru
+body:             |
+  bb.0.entry:
+    liveins: $v8
+    ; CHECK-LABEL: name: diff_regclass_passthru
+    ; CHECK: liveins: $v8
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8
+    ; CHECK-NEXT: [[PseudoVMV_V_I_MF2_:%[0-9]+]]:vrnov0 = PseudoVMV_V_I_MF2 [[COPY]], 0, 0, 5 /* e32 */, 0 /* tu, mu */
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vmv0 = COPY $v8
+    ; CHECK-NEXT: [[PseudoVLSE32_V_MF2_MASK:%[0-9]+]]:vrnov0 = PseudoVLSE32_V_MF2_MASK [[PseudoVMV_V_I_MF2_]], $noreg, $noreg, [[COPY1]], 0, 5 /* e32 */, 0 /* tu, mu */ :: (load unknown-size, align 4)
+    %0:vr = COPY $v8
+    %2:vr = PseudoVMV_V_I_MF2 $noreg, 0, -1, 5 /* e32 */, 0 /* tu, mu */
+    %3:vrnov0 = PseudoVMV_V_V_MF2 %0, %2, 0, 5 /* e32 */, 0 /* tu, mu */
----------------
lukel97 wrote:

Nit, change the VL to VLMAX in case something promises away the VL=0?

https://github.com/llvm/llvm-project/pull/138844


More information about the llvm-commits mailing list