[llvm] [RISCV] TableGen-erate RISC-V SDNodes (PR #138381)

[Sam Elliott via llvm-commits]

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@@ -2878,3 +3061,6 @@ defm : VPatSlide1VL_VX<riscv_slide1up_vl, "PseudoVSLIDE1UP">;
 defm : VPatSlide1VL_VF<riscv_fslide1up_vl, "PseudoVFSLIDE1UP">;
 defm : VPatSlide1VL_VX<riscv_slide1down_vl, "PseudoVSLIDE1DOWN">;
 defm : VPatSlide1VL_VF<riscv_fslide1down_vl, "PseudoVFSLIDE1DOWN">;
+
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lenary wrote:

Done

https://github.com/llvm/llvm-project/pull/138381