[llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)

[Matt Arsenault via llvm-commits]

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@@ -6899,7 +6899,17 @@ SDValue SITargetLowering::lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
     if (Op.getOpcode() != ISD::FP_ROUND)
       return Op;
 
-    SDValue FpToFp16 = DAG.getNode(ISD::FP_TO_FP16, DL, MVT::i32, Src);
+    if (!Subtarget->has16BitInsts()) {
+      SDValue FpToFp16 = DAG.getNode(ISD::FP_TO_FP16, DL, MVT::i32, Src);
+      SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, MVT::i16, FpToFp16);
+      return DAG.getNode(ISD::BITCAST, DL, MVT::f16, Trunc);
+    }
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arsenm wrote:

> we seems don't have any lit test that covers FP_ROUND f64 source in the old targets that do not support f16 types.

This is covered, fptrunc.ll has it. fptrunc.f16.ll should also cover it, but that one brokenly only tests with -enable-unsafe-fp-math 

It seems to work because we have explicit custom lowering f64 source. Seems like an unnecessary complication over the default expansion 

https://github.com/llvm/llvm-project/pull/128911