[llvm] [RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (PR #137045)

[Min-Yih Hsu via llvm-commits]

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@@ -24071,12 +24020,14 @@ bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore(
 
   if (auto *FVTy = dyn_cast<FixedVectorType>(InVTy)) {
     Function *VssegNFunc = Intrinsic::getOrInsertDeclaration(
-        SI->getModule(), FixedVssegIntrIds[Factor - 2],
-        {InVTy, SI->getPointerOperandType(), XLenTy});
+        SI->getModule(), FixedVssegIntrIds[Factor - 2], {InVTy, XLenTy});
 
     SmallVector<Value *, 10> Ops(InterleaveValues);
     Value *VL = ConstantInt::get(XLenTy, FVTy->getNumElements());
-    Ops.append({SI->getPointerOperand(), VL});
+    // All-ones mask.
+    Value *Mask = ConstantVector::getSplat(
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mshockwave wrote:

Fixed

https://github.com/llvm/llvm-project/pull/137045