[llvm] [AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (PR #133242)

[Jay Foad via llvm-commits]

jayfoad wrote:

> > > Carefully crafted compute test (the hw initializes at most one VGPR, so the test needs to ensure, no VGPR is ever written from any instruction). Also works as expected (correctly marks one VGPR as used).
> > 
> > 
> > This is getting a bit philosophical! Do we actually _need_ to report that one VGPR is used? What will the hardware do if you ask it to launch (say) a PS with 16 VGPR inputs, but with an allocation of only 8 VGPRs? Will it automatically increase the allocation to include all the inputs?
> 
> Aren't these different use cases? Graphics shaders (especially PS!) have some special handling in [AMDGPUAsmPrinter](https://github.com/llvm/llvm-project/blob/9c4c2426d5f3cf5128d544482c939f56c1f2911d/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp#L992) to make sure we include all the inputs (otherwise we might end up overwriting another wave's registers, from what I've heard). The case in the original quote is compute, and to be honest I don't know what the hardware would do. We weren't including all of these inputs before (hence the test churn in the latest version), so either we got lucky and never hit any edge cases, or this is handled somewhere else (firmware?).

All shaders must allocate at least one block of VGPRs. For a compute shader the hardware only initializes VGPR0, so there can never be a problem with the hardware not allocating enough registers to include all the inputs. That's the only reason I started talking about pixel shaders.

So I would ask again, do we actually _need_ to report that one VGPR is used in Sebastian's carefully crafted compute test?

https://github.com/llvm/llvm-project/pull/133242