[llvm] [RISCV][Peephole] Checking regclass compatibility in VMV (PR #138844)

[Luke Lau via llvm-commits]

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@@ -607,6 +612,11 @@ bool RISCVVectorPeephole::foldVMV_V_V(MachineInstr &MI) {
   if (!MRI->hasOneUse(MI.getOperand(2).getReg()))
     return false;
 
+  const TargetRegisterClass *RC1 = MRI->getRegClass(MI.getOperand(0).getReg());
+  const TargetRegisterClass *RC2 = MRI->getRegClass(MI.getOperand(2).getReg());
+  if (!RC1->hasSubClassEq(RC2))
+    return false;
+
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lukel97 wrote:

Instead of bailing if the reg classes, don't match, is it possible to instead just constrain the register class? E.g. just before we call `MRI->replaceRegWith` can we add

`MRI->constrainRegClass(Src->getOperand(0).getReg(), MRI->getRegClass(MI.getOperand(0).getReg()));`

https://github.com/llvm/llvm-project/pull/138844