[llvm] [AMDGPU] Legalize fminimum and fmaximum for gfx950 (PR #138971)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu May 8 02:46:57 PDT 2025


================
@@ -3114,34 +3108,34 @@ define <4 x half> @v_fminimum3_v4f16__inlineimm2(<4 x half> %a, <4 x half> %b) {
 ; GFX942-NEXT:    s_mov_b32 s0, 0x5040100
 ; GFX942-NEXT:    s_nop 0
 ; GFX942-NEXT:    v_cndmask_b32_e32 v6, v5, v4, vcc
+; GFX942-NEXT:    v_lshrrev_b32_e32 v4, 16, v4
 ; GFX942-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_1
-; GFX942-NEXT:    v_pk_min_f16 v2, v1, v3
-; GFX942-NEXT:    s_nop 0
-; GFX942-NEXT:    v_cndmask_b32_sdwa v0, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX942-NEXT:    v_cmp_o_f16_e32 vcc, v1, v3
 ; GFX942-NEXT:    s_nop 1
-; GFX942-NEXT:    v_cndmask_b32_e32 v4, v5, v2, vcc
+; GFX942-NEXT:    v_cndmask_b32_e32 v0, v5, v4, vcc
+; GFX942-NEXT:    v_pk_min_f16 v4, v1, v3
+; GFX942-NEXT:    v_cmp_o_f16_e32 vcc, v1, v3
+; GFX942-NEXT:    v_perm_b32 v2, v0, v6, s0
+; GFX942-NEXT:    v_pk_min_f16 v2, v2, 4.0 op_sel_hi:[1,0]
+; GFX942-NEXT:    v_cndmask_b32_e32 v7, v5, v4, vcc
 ; GFX942-NEXT:    v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_1
 ; GFX942-NEXT:    s_nop 1
-; GFX942-NEXT:    v_cndmask_b32_sdwa v1, v5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX942-NEXT:    v_perm_b32 v2, v1, v4, s0
-; GFX942-NEXT:    v_pk_min_f16 v2, v2, 4.0 op_sel_hi:[1,0]
-; GFX942-NEXT:    v_cmp_o_f16_e32 vcc, v4, v4
+; GFX942-NEXT:    v_cndmask_b32_sdwa v1, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+; GFX942-NEXT:    v_perm_b32 v3, v1, v7, s0
+; GFX942-NEXT:    v_pk_min_f16 v3, v3, 4.0 op_sel_hi:[1,0]
----------------
arsenm wrote:

The test changes are all for gfx942, something else is going on here 

https://github.com/llvm/llvm-project/pull/138971


More information about the llvm-commits mailing list