[llvm] [RISCV] Initial support for EarlyCSE (PR #138812)
Kito Cheng via llvm-commits
llvm-commits at lists.llvm.org
Thu May 8 00:15:50 PDT 2025
================
@@ -116,6 +117,50 @@ RISCVTTIImpl::getRISCVInstructionCost(ArrayRef<unsigned> OpCodes, MVT VT,
return Cost;
}
+Value *
+RISCVTTIImpl::getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
+ Type *ExpectedType) const {
+ Intrinsic::ID IID = Inst->getIntrinsicID();
+ switch (IID) {
+ default:
+ return nullptr;
+ // TODO: Add more memory intrinsic operations.
+ case Intrinsic::riscv_vle: {
+ if (Inst->getType() == ExpectedType)
+ return Inst;
+ }
+ return nullptr;
+ }
+}
+
+bool RISCVTTIImpl::getTgtMemIntrinsic(IntrinsicInst *Inst,
+ MemIntrinsicInfo &Info) const {
+ Intrinsic::ID IID = Inst->getIntrinsicID();
+ switch (IID) {
+ default:
+ return false;
+ case Intrinsic::riscv_vle: {
+ // Intrinsic interface:
+ // riscv_vle(merge, ptr, vl)
+ Info.ReadMem = true;
+ Info.WriteMem = false;
+ Info.PtrVal = Inst->getArgOperand(1);
+ Info.MatchingId = VECTOR_VLE_VSE;
+ break;
+ }
+ case Intrinsic::riscv_vse: {
+ // Intrinsic interface:
+ // riscv_vse(val, ptr, vl)
+ Info.ReadMem = false;
+ Info.WriteMem = true;
+ Info.PtrVal = Inst->getArgOperand(1);
+ Info.MatchingId = VECTOR_VLE_VSE;
+ break;
----------------
kito-cheng wrote:
Test case for vse?
https://github.com/llvm/llvm-project/pull/138812
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