[llvm] Initial commit (PR #138776)
Justin Fargnoli via llvm-commits
llvm-commits at lists.llvm.org
Wed May 7 09:25:01 PDT 2025
https://github.com/justinfargnoli updated https://github.com/llvm/llvm-project/pull/138776
>From 8a7d78f2e03d3d352cddee79616b17bcaac129eb Mon Sep 17 00:00:00 2001
From: Justin Fargnoli <jfargnoli at nvidia.com>
Date: Tue, 6 May 2025 22:56:42 +0000
Subject: [PATCH 1/2] Initial commit
---
llvm/include/llvm/CodeGen/TargetLowering.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index abe261728a3e6..30e6027329074 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -3024,7 +3024,7 @@ class TargetLoweringBase {
/// by referencing its sub-register AX.
/// Targets must return false when FromTy <= ToTy.
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const {
- return false;
+ return isTruncateFree(EVT::getEVT(FromTy), EVT::getEVT(ToTy));
}
/// Return true if a truncation from FromTy to ToTy is permitted when deciding
>From fe48812099e72456d99f310ef82d42fb108f7097 Mon Sep 17 00:00:00 2001
From: Justin Fargnoli <jfargnoli at nvidia.com>
Date: Wed, 7 May 2025 16:24:47 +0000
Subject: [PATCH 2/2] Cleanup target code
---
llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 --------
llvm/lib/Target/ARM/ARMISelLowering.h | 1 -
llvm/lib/Target/BPF/BPFISelLowering.cpp | 7 -------
llvm/lib/Target/BPF/BPFISelLowering.h | 1 -
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 4 ----
llvm/lib/Target/Hexagon/HexagonISelLowering.h | 1 -
llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 9 ---------
llvm/lib/Target/MSP430/MSP430ISelLowering.h | 1 -
llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 9 ---------
llvm/lib/Target/PowerPC/PPCISelLowering.h | 1 -
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 8 --------
llvm/lib/Target/SystemZ/SystemZISelLowering.h | 1 -
12 files changed, 51 deletions(-)
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 878f6878c2b60..2c4a57afe63bb 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -19288,14 +19288,6 @@ EVT ARMTargetLowering::getOptimalMemOpType(
// 64-bit integers are split into their high and low parts and held in two
// different registers, so the trunc is free since the low register can just
// be used.
-bool ARMTargetLowering::isTruncateFree(Type *SrcTy, Type *DstTy) const {
- if (!SrcTy->isIntegerTy() || !DstTy->isIntegerTy())
- return false;
- unsigned SrcBits = SrcTy->getPrimitiveSizeInBits();
- unsigned DestBits = DstTy->getPrimitiveSizeInBits();
- return (SrcBits == 64 && DestBits == 32);
-}
-
bool ARMTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const {
if (SrcVT.isVector() || DstVT.isVector() || !SrcVT.isInteger() ||
!DstVT.isInteger())
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 9fad056edd3f1..401dd6f297210 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -472,7 +472,6 @@ class VectorType;
EVT getOptimalMemOpType(const MemOp &Op,
const AttributeList &FuncAttributes) const override;
- bool isTruncateFree(Type *SrcTy, Type *DstTy) const override;
bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
bool isZExtFree(SDValue Val, EVT VT2) const override;
Type* shouldConvertSplatType(ShuffleVectorInst* SVI) const override;
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.cpp b/llvm/lib/Target/BPF/BPFISelLowering.cpp
index 6c196309d2d1a..f2221acad6739 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.cpp
+++ b/llvm/lib/Target/BPF/BPFISelLowering.cpp
@@ -198,13 +198,6 @@ bool BPFTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) cons
return false;
}
-bool BPFTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
- if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy())
- return false;
- unsigned NumBits1 = Ty1->getPrimitiveSizeInBits();
- unsigned NumBits2 = Ty2->getPrimitiveSizeInBits();
- return NumBits1 > NumBits2;
-}
bool BPFTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
if (!VT1.isInteger() || !VT2.isInteger())
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.h b/llvm/lib/Target/BPF/BPFISelLowering.h
index 8104895cb7f14..9ca77b8a1eec6 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.h
+++ b/llvm/lib/Target/BPF/BPFISelLowering.h
@@ -148,7 +148,6 @@ class BPFTargetLowering : public TargetLowering {
// isTruncateFree - Return true if it's free to truncate a value of
// type Ty1 to type Ty2. e.g. On BPF at alu32 mode, it's free to truncate
// a i64 value in register R1 to i32 by referencing its sub-register W1.
- bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
bool isTruncateFree(EVT VT1, EVT VT2) const override;
// For 32bit ALU result zext to 64bit is free.
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index fe12f99b91cd3..d6cf91f6c1c2c 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -2141,10 +2141,6 @@ bool HexagonTargetLowering::hasBitTest(SDValue X, SDValue Y) const {
return X.getValueType().isScalarInteger(); // 'tstbit'
}
-bool HexagonTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
- return isTruncateFree(EVT::getEVT(Ty1), EVT::getEVT(Ty2));
-}
-
bool HexagonTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
if (!VT1.isSimple() || !VT2.isSimple())
return false;
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
index 1321bee44a295..ca4040550624b 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
@@ -146,7 +146,6 @@ class HexagonTargetLowering : public TargetLowering {
MachineFunction &MF,
unsigned Intrinsic) const override;
- bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
bool isTruncateFree(EVT VT1, EVT VT2) const override;
bool isCheapToSpeculateCttz(Type *) const override { return true; }
diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
index 28d782543b330..9f40e5b937dad 100644
--- a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
+++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
@@ -1382,15 +1382,6 @@ const char *MSP430TargetLowering::getTargetNodeName(unsigned Opcode) const {
return nullptr;
}
-bool MSP430TargetLowering::isTruncateFree(Type *Ty1,
- Type *Ty2) const {
- if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy())
- return false;
-
- return (Ty1->getPrimitiveSizeInBits().getFixedValue() >
- Ty2->getPrimitiveSizeInBits().getFixedValue());
-}
-
bool MSP430TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
if (!VT1.isInteger() || !VT2.isInteger())
return false;
diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.h b/llvm/lib/Target/MSP430/MSP430ISelLowering.h
index d1263e453dda1..b0a0088decdeb 100644
--- a/llvm/lib/Target/MSP430/MSP430ISelLowering.h
+++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.h
@@ -113,7 +113,6 @@ namespace llvm {
/// isTruncateFree - Return true if it's free to truncate a value of type
/// Ty1 to type Ty2. e.g. On msp430 it's free to truncate a i16 value in
/// register R15W to i8 by referencing its sub-register R15B.
- bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
bool isTruncateFree(EVT VT1, EVT VT2) const override;
/// isZExtFree - Return true if any actual instruction that defines a value
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index f9e791e4b34f8..16c95fe29a4e1 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -18047,15 +18047,6 @@ bool PPCTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
unsigned BitSize = Ty->getPrimitiveSizeInBits();
return !(BitSize == 0 || BitSize > 64);
}
-
-bool PPCTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
- if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy())
- return false;
- unsigned NumBits1 = Ty1->getPrimitiveSizeInBits();
- unsigned NumBits2 = Ty2->getPrimitiveSizeInBits();
- return NumBits1 == 64 && NumBits2 == 32;
-}
-
bool PPCTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
if (!VT1.isInteger() || !VT2.isInteger())
return false;
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index 7365f3103276c..9ae4294f28e20 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -1039,7 +1039,6 @@ namespace llvm {
/// isTruncateFree - Return true if it's free to truncate a value of
/// type Ty1 to type Ty2. e.g. On PPC it's free to truncate a i64 value in
/// register X1 to i32 by referencing its sub-register R1.
- bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
bool isTruncateFree(EVT VT1, EVT VT2) const override;
bool isZExtFree(SDValue Val, EVT VT2) const override;
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index db8b2bdb62077..369859a28614b 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -1445,14 +1445,6 @@ EVT SystemZTargetLowering::getOptimalMemOpType(const MemOp &Op,
return Subtarget.hasVector() ? MVT::v2i64 : MVT::Other;
}
-bool SystemZTargetLowering::isTruncateFree(Type *FromType, Type *ToType) const {
- if (!FromType->isIntegerTy() || !ToType->isIntegerTy())
- return false;
- unsigned FromBits = FromType->getPrimitiveSizeInBits().getFixedValue();
- unsigned ToBits = ToType->getPrimitiveSizeInBits().getFixedValue();
- return FromBits > ToBits;
-}
-
bool SystemZTargetLowering::isTruncateFree(EVT FromVT, EVT ToVT) const {
if (!FromVT.isInteger() || !ToVT.isInteger())
return false;
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.h b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
index f3536a840fda8..2ae5a84575a9b 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.h
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
@@ -515,7 +515,6 @@ class SystemZTargetLowering : public TargetLowering {
const AttributeList &FuncAttributes) const override;
EVT getOptimalMemOpType(const MemOp &Op,
const AttributeList &FuncAttributes) const override;
- bool isTruncateFree(Type *, Type *) const override;
bool isTruncateFree(EVT, EVT) const override;
bool shouldFormOverflowOp(unsigned Opcode, EVT VT,
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