[llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)

Gheorghe-Teodor Bercea via llvm-commits llvm-commits at lists.llvm.org
Wed May 7 07:47:08 PDT 2025


doru1004 wrote:

> Can you fix the description to be more specific about what it enables vectorization of? Is this only for loads and stores? We already have the load/store vectorizer to mostly ignore the cost of vector operations. Most of the tests look like no-ops, can you split this to have a pre-commit adding the baseline tests?

This is not particular to loads and stores. This is about letting the cost model decide when it is profitable to group together i8s into an i32 instruction. Some instructions are not deemed profitable, hence the tests that seem to not be doing anything but in some cases it is. It is a particularly sensitive issue for load/store instructions hence maybe the extra focus on that but otherwise it is not limited to one type of instruction.

https://github.com/llvm/llvm-project/pull/134934


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