[llvm] [RISCV][Peephole] Clear kill flags for registers after fold VMV (PR #138847)

[Luke Lau via llvm-commits]

================
@@ -0,0 +1,136 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc %s -o - -mtriple=riscv64 -mattr=+v -run-pass=riscv-vector-peephole \
+# RUN:  -verify-machineinstrs | FileCheck %s
+
+--- |
+  source_filename = "reduced.ll"
+  target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
+  target triple = "riscv64-unknown-linux-gnu"
+
+  define i32 @main() #0 {
+  entry:
+    %0 = tail call <vscale x 4 x i16> @llvm.riscv.vmv.v.v.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> zeroinitializer, i64 0)
+    %1 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) zeroinitializer, <vscale x 4 x i16> %0, i32 0)
+    %2 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %1, <vscale x 4 x i16> zeroinitializer, i32 0)
+    call void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) %2, ptr null, i64 0, i64 4)
+    ret i32 0
+  }
+
+  declare <vscale x 4 x i16> @llvm.riscv.vmv.v.v.nxv4i16.i64(<vscale x 4 x i16>, <vscale x 4 x i16>, i64) #1
+
+  declare target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv8i8_7t.nxv4i16(target("riscv.vector.tuple", <vscale x 8 x i8>, 7), <vscale x 4 x i16>, i32 immarg) #2
+
+  declare void @llvm.riscv.vsseg7.triscv.vector.tuple_nxv8i8_7t.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7), ptr captures(none), i64, i64 immarg) #3
+
+  attributes #0 = { "target-features"="+v" }
+  attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) "target-features"="+v" }
+  attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) "target-features"="+v" }
+  attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: write) "target-features"="+v" }
+
+...
+---
+name:            main
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+failedISel:      false
+tracksRegLiveness: true
----------------
lukel97 wrote:

Can we use a simpler test and put it inside vmv.v.v-peephole.mir? This seems to be enough to recreate it

```yaml
---
name: kill_flag
tracksRegLiveness: true
body: |
  bb.0:
    %0:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */
    %1:vr = PseudoVMV_V_V_M1 $noreg, %0, -1, 4 /* e16 */, 0 /* tu, mu */
    %2:vr = COPY killed %1
    %3:vr = COPY %0
...
```

https://github.com/llvm/llvm-project/pull/138847