[llvm] [SPIRV] Support for SPV_INTEL_fpga_reg extension (PR #134352)

[via llvm-commits]

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@@ -238,6 +238,22 @@ static SmallVector<Metadata *> parseAnnotation(Value *I,
                                                 : SmallVector<Metadata *>{};
 }
 
+static bool lowerAnnotation(IntrinsicInst *II) {
+  std::string Anno =
+      getAnnotation(II->getArgOperand(1),
+                    4 < II->arg_size() ? II->getArgOperand(4) : nullptr);
+  if (Anno == "__builtin_intel_fpga_reg") {
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EbinJose2002 wrote:

Actually I was implementing this extension as part of an internship project. I was tasked to identify extensions that were implemented in llvm-spirv translator but not implemented in llvm-project and contribute if possible. That's how I came up with this extension implementation.
So how should I proceed ?

https://github.com/llvm/llvm-project/pull/134352