[llvm] [VPlan] Retain exit conditions and edges in initial VPlan (NFC). (PR #137709)
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Wed May 7 01:49:29 PDT 2025
================
@@ -425,21 +409,31 @@ static void createLoopRegion(VPlan &Plan, VPBlockBase *HeaderVPB) {
VPBlockUtils::disconnectBlocks(PreheaderVPBB, HeaderVPB);
VPBlockUtils::disconnectBlocks(LatchVPBB, HeaderVPB);
VPBlockBase *Succ = LatchVPBB->getSingleSuccessor();
- assert(LatchVPBB->getNumSuccessors() <= 1 &&
- "Latch has more than one successor");
- if (Succ)
- VPBlockUtils::disconnectBlocks(LatchVPBB, Succ);
+ assert(Succ && "Latch expected to be left with a single successor");
+
+ // Use a temporary placeholder between LatchVPBB and its successor, to
+ // preserve the original predecessor/successor order of the blocks.
+ auto *PlaceHolder = Plan.createVPBasicBlock("Region place holder");
+ VPBlockUtils::insertOnEdge(LatchVPBB, Succ, PlaceHolder);
+ VPBlockUtils::disconnectBlocks(LatchVPBB, PlaceHolder);
+ VPBlockUtils::connectBlocks(PreheaderVPBB, PlaceHolder);
auto *R = Plan.createVPRegionBlock(HeaderVPB, LatchVPBB, "",
false /*isReplicator*/);
- // All VPBB's reachable shallowly from HeaderVPB belong to top level loop,
- // because VPlan is expected to end at top level latch disconnected above.
+ // All VPBB's reachable shallowly from HeaderVPB belong to the current region,
+ // except the exit blocks reachable via non-latch exiting blocks,
----------------
fhahn wrote:
Fixed thanks!
https://github.com/llvm/llvm-project/pull/137709
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