[llvm] [AMDGPU] Consider FLAT instructions for VMEM hazard detection (PR #137170)

[Jay Foad via llvm-commits]

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@@ -1417,9 +1417,8 @@ static bool shouldRunLdsBranchVmemWARHazardFixup(const MachineFunction &MF,
   bool HasVmem = false;
   for (auto &MBB : MF) {
     for (auto &MI : MBB) {
-      HasLds |= SIInstrInfo::isDS(MI);
-      HasVmem |= (SIInstrInfo::isVMEM(MI) && !SIInstrInfo::isFLAT(MI)) ||
-                 SIInstrInfo::isSegmentSpecificFLAT(MI);
+      HasLds |= SIInstrInfo::isDS(MI) || SIInstrInfo::isLDSDMA(MI);
+      HasVmem |= SIInstrInfo::isVMEM(MI) && !SIInstrInfo::isLDSDMA(MI);
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jayfoad wrote:

Without having a deep understanding of the hazard, it is not clear to me why you would exclude isLDSDMA here. I.e. why shouldn't an instruction like GLOBAL_LOAD_LDS_DWORD satisfy both the HasLds and HasVmem conditions?

https://github.com/llvm/llvm-project/pull/137170