[llvm] [VPlan] Retain exit conditions and edges in initial VPlan (NFC). (PR #137709)

via llvm-commits llvm-commits at lists.llvm.org
Tue May 6 07:47:01 PDT 2025


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@@ -447,19 +424,21 @@ static void createLoopRegion(VPlan &Plan, VPBlockBase *HeaderVPB) {
   VPBlockBase *Succ = LatchVPBB->getSingleSuccessor();
   assert(LatchVPBB->getNumSuccessors() <= 1 &&
          "Latch has more than one successor");
-  if (Succ)
-    VPBlockUtils::disconnectBlocks(LatchVPBB, Succ);
+  LatchVPBB->removeSuccessor(Succ);
 
   auto *R = Plan.createVPRegionBlock(HeaderVPB, LatchVPBB, "",
                                      false /*isReplicator*/);
   // All VPBB's reachable shallowly from HeaderVPB belong to top level loop,
   // because VPlan is expected to end at top level latch disconnected above.
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ayalz wrote:

Above explanation needs update - can now also reach exit blocks from HeaderVPB - via early exits?
Latch isn't fully disconnected yet its successors are, which should still prevent reaching an exit block from it?

https://github.com/llvm/llvm-project/pull/137709


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