[llvm] 9c9013f - [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (#135424)

[via llvm-commits]

Author: Akhilesh Moorthy
Date: 2025-05-05T18:12:35+02:00
New Revision: 9c9013f703f0b5736fc33df05de3fabaab22459e

URL: https://github.com/llvm/llvm-project/commit/9c9013f703f0b5736fc33df05de3fabaab22459e
DIFF: https://github.com/llvm/llvm-project/commit/9c9013f703f0b5736fc33df05de3fabaab22459e.diff

LOG: [AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (#135424)

This patch handles the global operand type properly, fixing the
bug : Assertion `(isFI() || isCPI() || isTargetIndex() ||
isJTI()) && "Wrong MachineOperand accessor"` failed.

Fixes SWDEV-504645

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>

Added: 
    llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll

Modified: 
    llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index 97ad0c2ce5158..66e674949c047 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1171,8 +1171,14 @@ void SIFoldOperandsImpl::foldOperand(
 
         if (OpToFold.isImm())
           UseMI->getOperand(1).ChangeToImmediate(OpToFold.getImm());
-        else
+        else if (OpToFold.isFI())
           UseMI->getOperand(1).ChangeToFrameIndex(OpToFold.getIndex());
+        else {
+          assert(OpToFold.isGlobal());
+          UseMI->getOperand(1).ChangeToGA(OpToFold.getGlobal(),
+                                          OpToFold.getOffset(),
+                                          OpToFold.getTargetFlags());
+        }
         UseMI->removeOperand(2); // Remove exec read (or src1 for readlane)
         return;
       }

diff  --git a/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll b/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
new file mode 100644
index 0000000000000..c4af66e922e8d
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
@@ -0,0 +1,44 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck %s
+
+define void @test_load_zext() {
+; CHECK-LABEL: test_load_zext:
+; CHECK:       ; %bb.0: ; %.entry
+; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK-NEXT:    s_mov_b32 s0, s33
+; CHECK-NEXT:    s_mov_b32 s33, s32
+; CHECK-NEXT:    s_or_saveexec_b64 s[2:3], -1
+; CHECK-NEXT:    scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
+; CHECK-NEXT:    s_mov_b64 exec, s[2:3]
+; CHECK-NEXT:    s_add_i32 s32, s32, 16
+; CHECK-NEXT:    v_writelane_b32 v40, s0, 2
+; CHECK-NEXT:    s_getpc_b64 s[0:1]
+; CHECK-NEXT:    s_add_u32 s0, s0, has_spgr_args at gotpcrel32@lo+4
+; CHECK-NEXT:    s_addc_u32 s1, s1, has_spgr_args at gotpcrel32@hi+12
+; CHECK-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x0
+; CHECK-NEXT:    v_writelane_b32 v40, s30, 0
+; CHECK-NEXT:    s_mov_b32 s0, DescriptorBuffer at abs32@lo
+; CHECK-NEXT:    v_writelane_b32 v40, s31, 1
+; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
+; CHECK-NEXT:    s_swappc_b64 s[30:31], s[2:3]
+; CHECK-NEXT:    v_readlane_b32 s31, v40, 1
+; CHECK-NEXT:    v_readlane_b32 s30, v40, 0
+; CHECK-NEXT:    s_mov_b32 s32, s33
+; CHECK-NEXT:    v_readlane_b32 s0, v40, 2
+; CHECK-NEXT:    s_or_saveexec_b64 s[2:3], -1
+; CHECK-NEXT:    scratch_load_dword v40, off, s33 ; 4-byte Folded Reload
+; CHECK-NEXT:    s_mov_b64 exec, s[2:3]
+; CHECK-NEXT:    s_mov_b32 s33, s0
+; CHECK-NEXT:    s_waitcnt vmcnt(0)
+; CHECK-NEXT:    s_setpc_b64 s[30:31]
+.entry:
+  %reloc = call i32 @llvm.amdgcn.reloc.constant(metadata !0)
+  call void @has_spgr_args(i32 %reloc)
+  ret void
+}
+
+declare void @has_spgr_args(i32 inreg)
+
+declare i32 @llvm.amdgcn.reloc.constant(metadata) #0
+
+!0 = !{!"DescriptorBuffer", i32 4, i32 8, i32 0, i32 0}