[llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,128 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=arm < %s | FileCheck %s -check-prefix ARM
+; RUN: llc -mtriple=arm -mattr +neon < %s | FileCheck %s -check-prefix ARM-NEON
+
+define void @memop_soft_float() "use-soft-float"="true" {
+; ARM-LABEL: memop_soft_float:
+; ARM:       @ %bb.0:
+; ARM-NEXT:    push {r4, lr}
+; ARM-NEXT:    mov r2, #0
+; ARM-NEXT:    mov lr, #0
+; ARM-NEXT:    ldm r2!, {r0, r1, r3, r4}
+; ARM-NEXT:    mov r12, #0
+; ARM-NEXT:    stm lr!, {r0, r1, r3, r4}
+; ARM-NEXT:    ldm r2, {r0, r1, r3, r4}
+; ARM-NEXT:    stm lr, {r0, r1, r3, r4}
+; ARM-NEXT:    mov r0, #28
+; ARM-NEXT:    str r12, [r0]
+; ARM-NEXT:    mov r0, #24
+; ARM-NEXT:    str r12, [r0]
+; ARM-NEXT:    mov r0, #20
+; ARM-NEXT:    str r12, [r0]
+; ARM-NEXT:    mov r0, #16
+; ARM-NEXT:    str r12, [r0]
+; ARM-NEXT:    mov r0, #12
+; ARM-NEXT:    str r12, [r0]
+; ARM-NEXT:    mov r0, #8
+; ARM-NEXT:    str r12, [r0]
+; ARM-NEXT:    mov r0, #4
+; ARM-NEXT:    str r12, [r0]
+; ARM-NEXT:    str r12, [r12]
+; ARM-NEXT:    pop {r4, lr}
+; ARM-NEXT:    mov pc, lr
+;
+; ARM-NEON-LABEL: memop_soft_float:
+; ARM-NEON:       @ %bb.0:
+; ARM-NEON-NEXT:    push {r4, lr}
+; ARM-NEON-NEXT:    mov r2, #0
+; ARM-NEON-NEXT:    mov lr, #0
+; ARM-NEON-NEXT:    ldm r2!, {r0, r1, r3, r4}
+; ARM-NEON-NEXT:    mov r12, #0
+; ARM-NEON-NEXT:    stm lr!, {r0, r1, r3, r4}
+; ARM-NEON-NEXT:    ldm r2, {r0, r1, r3, r4}
+; ARM-NEON-NEXT:    stm lr, {r0, r1, r3, r4}
+; ARM-NEON-NEXT:    mov r0, #28
+; ARM-NEON-NEXT:    str r12, [r0]
+; ARM-NEON-NEXT:    mov r0, #24
+; ARM-NEON-NEXT:    str r12, [r0]
+; ARM-NEON-NEXT:    mov r0, #20
+; ARM-NEON-NEXT:    str r12, [r0]
+; ARM-NEON-NEXT:    mov r0, #16
+; ARM-NEON-NEXT:    str r12, [r0]
+; ARM-NEON-NEXT:    mov r0, #12
+; ARM-NEON-NEXT:    str r12, [r0]
+; ARM-NEON-NEXT:    mov r0, #8
+; ARM-NEON-NEXT:    str r12, [r0]
+; ARM-NEON-NEXT:    mov r0, #4
+; ARM-NEON-NEXT:    str r12, [r0]
+; ARM-NEON-NEXT:    str r12, [r12]
+; ARM-NEON-NEXT:    pop {r4, lr}
+; ARM-NEON-NEXT:    mov pc, lr
+    call void @llvm.memcpy.p0.p0.i32(ptr null, ptr null, i32 32, i1 true)
+    call void @llvm.memset.p0.i32(ptr null, i8 0, i32 32, i1 true)
+    ret void
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arsenm wrote:

2 space indent. Also avoid the UB null accesses? 

https://github.com/llvm/llvm-project/pull/107022