[llvm] b3e8b21 - Sparc: Remove fixup kinds and specifiers for GOT10/GOT13/GOT22/PC10/PC22
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun May 4 20:21:51 PDT 2025
Author: Fangrui Song
Date: 2025-05-04T20:21:46-07:00
New Revision: b3e8b21c57cc5549767d21a2be43baeec431c6f7
URL: https://github.com/llvm/llvm-project/commit/b3e8b21c57cc5549767d21a2be43baeec431c6f7
DIFF: https://github.com/llvm/llvm-project/commit/b3e8b21c57cc5549767d21a2be43baeec431c6f7.diff
LOG: Sparc: Remove fixup kinds and specifiers for GOT10/GOT13/GOT22/PC10/PC22
Similar to f39696e7dee4f1dce8c10d2b17f987643c480895
Added:
Modified:
llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcFixupKinds.h
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
llvm/lib/Target/Sparc/SparcISelLowering.cpp
llvm/test/MC/Sparc/relocation-specifier.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index bba96b68c8559..3b81cce6582eb 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -11,6 +11,7 @@
#include "TargetInfo/SparcTargetInfo.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCAsmMacro.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
@@ -1677,12 +1678,12 @@ SparcAsmParser::adjustPICRelocation(SparcMCExpr::Specifier VK,
switch(VK) {
default: break;
case SparcMCExpr::VK_LO:
- VK = (hasGOTReference(subExpr) ? SparcMCExpr::VK_PC10
- : SparcMCExpr::VK_GOT10);
+ VK = SparcMCExpr::Specifier(
+ hasGOTReference(subExpr) ? ELF::R_SPARC_PC10 : ELF::R_SPARC_GOT10);
break;
case SparcMCExpr::VK_HI:
- VK = (hasGOTReference(subExpr) ? SparcMCExpr::VK_PC22
- : SparcMCExpr::VK_GOT22);
+ VK = SparcMCExpr::Specifier(
+ hasGOTReference(subExpr) ? ELF::R_SPARC_PC22 : ELF::R_SPARC_GOT22);
break;
}
}
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
index 7223c9ccd063b..2af1184ffabf8 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
@@ -53,7 +53,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
case Sparc::fixup_sparc_hix22:
return (~Value >> 10) & 0x3fffff;
- case Sparc::fixup_sparc_pc22:
+ case ELF::R_SPARC_PC22:
case Sparc::fixup_sparc_hi22:
case Sparc::fixup_sparc_lm:
return (Value >> 10) & 0x3fffff;
@@ -64,7 +64,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
case Sparc::fixup_sparc_lox10:
return (Value & 0x3ff) | 0x1c00;
- case Sparc::fixup_sparc_pc10:
+ case ELF::R_SPARC_PC10:
case Sparc::fixup_sparc_lo10:
return Value & 0x3ff;
@@ -136,8 +136,6 @@ namespace {
{ "fixup_sparc_hh", 10, 22, 0 },
{ "fixup_sparc_hm", 22, 10, 0 },
{ "fixup_sparc_lm", 10, 22, 0 },
- { "fixup_sparc_pc22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
- { "fixup_sparc_pc10", 22, 10, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_sparc_hix22", 10, 22, 0 },
{ "fixup_sparc_lox10", 19, 13, 0 },
};
@@ -154,28 +152,35 @@ namespace {
{ "fixup_sparc_hh", 0, 22, 0 },
{ "fixup_sparc_hm", 0, 10, 0 },
{ "fixup_sparc_lm", 0, 22, 0 },
- { "fixup_sparc_pc22", 0, 22, MCFixupKindInfo::FKF_IsPCRel },
- { "fixup_sparc_pc10", 0, 10, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_sparc_hix22", 0, 22, 0 },
{ "fixup_sparc_lox10", 0, 13, 0 },
};
// clang-format on
- // Fixup kinds from .reloc directive are like R_SPARC_NONE. They do
- // not require any extra processing.
- if (mc::isRelocation(Kind))
- return MCAsmBackend::getFixupKindInfo(FK_NONE);
+ if (!mc::isRelocation(Kind)) {
+ if (Kind < FirstTargetFixupKind)
+ return MCAsmBackend::getFixupKindInfo(Kind);
+ assert(unsigned(Kind - FirstTargetFixupKind) <
+ Sparc::NumTargetFixupKinds &&
+ "Invalid kind!");
+ if (Endian == llvm::endianness::little)
+ return InfosLE[Kind - FirstTargetFixupKind];
- if (Kind < FirstTargetFixupKind)
- return MCAsmBackend::getFixupKindInfo(Kind);
+ return InfosBE[Kind - FirstTargetFixupKind];
+ }
- assert(unsigned(Kind - FirstTargetFixupKind) <
- Sparc::NumTargetFixupKinds &&
- "Invalid kind!");
+ MCFixupKindInfo Info{};
+ switch (uint16_t(Kind)) {
+ case ELF::R_SPARC_PC10:
+ Info = {"", 22, 10, MCFixupKindInfo::FKF_IsPCRel};
+ break;
+ case ELF::R_SPARC_PC22:
+ Info = {"", 10, 22, MCFixupKindInfo::FKF_IsPCRel};
+ break;
+ }
if (Endian == llvm::endianness::little)
- return InfosLE[Kind - FirstTargetFixupKind];
-
- return InfosBE[Kind - FirstTargetFixupKind];
+ Info.TargetOffset = 32 - Info.TargetOffset - Info.TargetSize;
+ return Info;
}
bool shouldForceRelocation(const MCAssembler &, const MCFixup &,
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
index c365b9b9f589f..0bbad66efb680 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
@@ -95,8 +95,6 @@ unsigned SparcELFObjectWriter::getRelocType(MCContext &Ctx,
case Sparc::fixup_sparc_br19: return ELF::R_SPARC_WDISP19;
case Sparc::fixup_sparc_br16:
return ELF::R_SPARC_WDISP16;
- case Sparc::fixup_sparc_pc22: return ELF::R_SPARC_PC22;
- case Sparc::fixup_sparc_pc10: return ELF::R_SPARC_PC10;
}
}
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcFixupKinds.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcFixupKinds.h
index a7c1d509b9051..3af2f462972bb 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcFixupKinds.h
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcFixupKinds.h
@@ -48,12 +48,6 @@ namespace llvm {
/// fixup_sparc_lm - 22-bit fixup corresponding to %lm(foo)
fixup_sparc_lm,
- /// fixup_sparc_pc22 - 22-bit fixup corresponding to %pc22(foo)
- fixup_sparc_pc22,
-
- /// fixup_sparc_pc10 - 10-bit fixup corresponding to %pc10(foo)
- fixup_sparc_pc10,
-
/// 22-bit fixup corresponding to %hix(foo)
fixup_sparc_hix22,
/// 13-bit fixup corresponding to %lox(foo)
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
index 325d8b7dd1ecb..6c83a8c31b41f 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
@@ -51,11 +51,11 @@ StringRef SparcMCExpr::getSpecifierName(SparcMCExpr::Specifier S) {
case VK_HM: return "hm";
case VK_LM: return "lm";
// FIXME: use %pc22/%pc10, if system assembler supports them.
- case VK_PC22: return "hi";
- case VK_PC10: return "lo";
- case VK_GOT22: return "hi";
- case VK_GOT10: return "lo";
- case VK_GOT13: return {};
+ case ELF::R_SPARC_PC22: return "hi";
+ case ELF::R_SPARC_PC10: return "lo";
+ case ELF::R_SPARC_GOT22: return "hi";
+ case ELF::R_SPARC_GOT10: return "lo";
+ case ELF::R_SPARC_GOT13: return {};
case VK_R_DISP32: return "r_disp32";
case VK_TLS_GD_HI22: return "tgd_hi22";
case VK_TLS_GD_LO10: return "tgd_lo10";
@@ -97,11 +97,11 @@ SparcMCExpr::Specifier SparcMCExpr::parseSpecifier(StringRef name) {
.Case("hm", VK_HM)
.Case("ulo", VK_HM) // Nonstandard GNU extension
.Case("lm", VK_LM)
- .Case("pc22", VK_PC22)
- .Case("pc10", VK_PC10)
- .Case("got22", VK_GOT22)
- .Case("got10", VK_GOT10)
- .Case("got13", VK_GOT13)
+ .Case("pc22", (SparcMCExpr::Specifier)ELF::R_SPARC_PC22)
+ .Case("pc10", (SparcMCExpr::Specifier)ELF::R_SPARC_PC10)
+ .Case("got22", (SparcMCExpr::Specifier)ELF::R_SPARC_GOT22)
+ .Case("got10", (SparcMCExpr::Specifier)ELF::R_SPARC_GOT10)
+ .Case("got13", (SparcMCExpr::Specifier)ELF::R_SPARC_GOT13)
.Case("r_disp32", VK_R_DISP32)
.Case("tgd_hi22", VK_TLS_GD_HI22)
.Case("tgd_lo10", VK_TLS_GD_LO10)
@@ -140,11 +140,6 @@ uint16_t SparcMCExpr::getFixupKind() const {
case VK_HH: return Sparc::fixup_sparc_hh;
case VK_HM: return Sparc::fixup_sparc_hm;
case VK_LM: return Sparc::fixup_sparc_lm;
- case VK_PC22: return Sparc::fixup_sparc_pc22;
- case VK_PC10: return Sparc::fixup_sparc_pc10;
- case VK_GOT22: return ELF::R_SPARC_GOT22;
- case VK_GOT10: return ELF::R_SPARC_GOT10;
- case VK_GOT13: return ELF::R_SPARC_GOT13;
case VK_TLS_GD_HI22: return ELF::R_SPARC_TLS_GD_HI22;
case VK_TLS_GD_LO10: return ELF::R_SPARC_TLS_GD_LO10;
case VK_TLS_GD_ADD: return ELF::R_SPARC_TLS_GD_ADD;
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
index 724d6761dd933..1044aa5adb6dc 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
@@ -29,11 +29,6 @@ class SparcMCExpr : public MCTargetExpr {
VK_HH,
VK_HM,
VK_LM,
- VK_PC22,
- VK_PC10,
- VK_GOT22,
- VK_GOT10,
- VK_GOT13,
VK_R_DISP32,
VK_TLS_GD_HI22,
VK_TLS_GD_LO10,
diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index e82652632c983..c2ddfcbd7c89d 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -88,9 +88,9 @@ static MCOperand createPCXCallOP(MCSymbol *Label,
return MCOperand::createExpr(MCSymbolRefExpr::create(Label, OutContext));
}
-static MCOperand createPCXRelExprOp(SparcMCExpr::Specifier Kind,
- MCSymbol *GOTLabel, MCSymbol *StartLabel,
- MCSymbol *CurLabel, MCContext &OutContext) {
+static MCOperand createPCXRelExprOp(uint16_t Spec, MCSymbol *GOTLabel,
+ MCSymbol *StartLabel, MCSymbol *CurLabel,
+ MCContext &OutContext) {
const MCSymbolRefExpr *GOT = MCSymbolRefExpr::create(GOTLabel, OutContext);
const MCSymbolRefExpr *Start = MCSymbolRefExpr::create(StartLabel,
OutContext);
@@ -99,8 +99,8 @@ static MCOperand createPCXRelExprOp(SparcMCExpr::Specifier Kind,
const MCBinaryExpr *Sub = MCBinaryExpr::createSub(Cur, Start, OutContext);
const MCBinaryExpr *Add = MCBinaryExpr::createAdd(GOT, Sub, OutContext);
- const SparcMCExpr *expr = SparcMCExpr::create(Kind,
- Add, OutContext);
+ const SparcMCExpr *expr =
+ SparcMCExpr::create(SparcMCExpr::Specifier(Spec), Add, OutContext);
return MCOperand::createExpr(expr);
}
@@ -249,12 +249,12 @@ void SparcAsmPrinter::LowerGETPCXAndEmitMCInsts(const MachineInstr *MI,
EmitRDPC(*OutStreamer, RegO7, STI);
}
OutStreamer->emitLabel(SethiLabel);
- MCOperand hiImm = createPCXRelExprOp(SparcMCExpr::VK_PC22, GOTLabel,
- StartLabel, SethiLabel, OutContext);
+ MCOperand hiImm = createPCXRelExprOp(ELF::R_SPARC_PC22, GOTLabel, StartLabel,
+ SethiLabel, OutContext);
EmitSETHI(*OutStreamer, hiImm, MCRegOP, STI);
OutStreamer->emitLabel(EndLabel);
- MCOperand loImm = createPCXRelExprOp(SparcMCExpr::VK_PC10, GOTLabel,
- StartLabel, EndLabel, OutContext);
+ MCOperand loImm = createPCXRelExprOp(ELF::R_SPARC_PC10, GOTLabel, StartLabel,
+ EndLabel, OutContext);
EmitOR(*OutStreamer, MCRegOP, loImm, MCRegOP, STI);
EmitADD(*OutStreamer, MCRegOP, RegO7, MCRegOP, STI);
}
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index f0273daac6045..d2d1cc067f056 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -2180,10 +2180,10 @@ SDValue SparcTargetLowering::makeAddress(SDValue Op, SelectionDAG &DAG) const {
if (picLevel == PICLevel::SmallPIC) {
// This is the pic13 code model, the GOT is known to be smaller than 8KiB.
Idx = DAG.getNode(SPISD::Lo, DL, Op.getValueType(),
- withTargetFlags(Op, SparcMCExpr::VK_GOT13, DAG));
+ withTargetFlags(Op, ELF::R_SPARC_GOT13, DAG));
} else {
// This is the pic32 code model, the GOT is known to be smaller than 4GB.
- Idx = makeHiLoPair(Op, SparcMCExpr::VK_GOT22, SparcMCExpr::VK_GOT10, DAG);
+ Idx = makeHiLoPair(Op, ELF::R_SPARC_GOT22, ELF::R_SPARC_GOT10, DAG);
}
SDValue GlobalBase = DAG.getNode(SPISD::GLOBAL_BASE_REG, DL, VT);
diff --git a/llvm/test/MC/Sparc/relocation-specifier.s b/llvm/test/MC/Sparc/relocation-specifier.s
index 1051cc7b97e95..8f74b5c4cf10c 100644
--- a/llvm/test/MC/Sparc/relocation-specifier.s
+++ b/llvm/test/MC/Sparc/relocation-specifier.s
@@ -24,6 +24,8 @@
# READELF: TLS GLOBAL DEFAULT UND s_tgd_lo10
# READELF: TLS GLOBAL DEFAULT UND s_tgd_add
+main:
+
# ASM: or %g1, %lo(sym), %g3
# ASM-NEXT: sethi %hi(sym), %l0
# ASM-NEXT: sethi %h44(sym), %l0
@@ -40,16 +42,30 @@ sethi %h44(sym), %l0
or %g1, %m44(sym), %g3
or %g1, %l44(sym), %g3
+## FIXME: Emit %pc22/%pc10
+# ASM: sethi %hi(sym), %o1
+# ASM-NEXT: or %o1, %lo(sym), %o1
+# OBJDUMP: sethi 0x0, %o1
+# OBJDUMP-NEXT: R_SPARC_PC22 sym
+# OBJDUMP-NEXT: or %o1, 0x0, %o1
+# OBJDUMP-NEXT: R_SPARC_PC10 sym
+# OBJDUMP-NEXT: sethi 0x3fffff, %o1
+# OBJDUMP-NEXT: or %o1, 0x3e0, %o1
+sethi %pc22(sym), %o1
+or %o1, %pc10(sym), %o1
+sethi %pc22(main), %o1
+or %o1, %pc10(main), %o1
+
# ASM: sethi %hh(sym), %l0
# ASM-NEXT: sethi %hh(sym), %l0
# ASM-NEXT: or %g1, %hm(sym), %g3
# ASM-NEXT: or %g1, %hm(sym), %g3
# ASM-NEXT: sethi %lm(sym), %l0
-# OBJDUMP: 0000014: R_SPARC_HH22 sym
-# OBJDUMP: 0000018: R_SPARC_HH22 sym
-# OBJDUMP: 000001c: R_SPARC_HM10 sym
-# OBJDUMP: 0000020: R_SPARC_HM10 sym
-# OBJDUMP: 0000024: R_SPARC_LM22 sym
+# OBJDUMP: R_SPARC_HH22 sym
+# OBJDUMP: R_SPARC_HH22 sym
+# OBJDUMP: R_SPARC_HM10 sym
+# OBJDUMP: R_SPARC_HM10 sym
+# OBJDUMP: R_SPARC_LM22 sym
sethi %hh(sym), %l0
sethi %uhi(sym), %l0
or %g1, %hm(sym), %g3
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