[llvm] [AArch64] Fix reserved registers being saved in prolog/epilog (PR #138448)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-aarch64

Author: None (yasuna-oribe)

<details>
<summary>Changes</summary>

GCC's man page is clear on how -ffixed-reg must behave:
```
  Treat the register named reg as a fixed register; generated
  code should never refer to it (except perhaps as a stack pointer,
  frame pointer or in some other fixed role).
```

This implies prolog/epilog code also must not save/restore explicitly fixed registers, even when it is callee-saved. Some projects rely on this (GCC's) behavior.

For example,
```
void f() {
  register uint64_t x28 asm("x28") = 0xee;
  asm volatile("" : "+r"(x28)); // avoid mov being eliminated
}
```
should not touch x28 outside of `mov w28,#<!-- -->0xee`.

For riscv64, clang behaves the same as GCC, so I am inclined to believe this is indeed a bug.

Fixes #<!-- -->111379.

---
Full diff: https://github.com/llvm/llvm-project/pull/138448.diff


1 Files Affected:

- (modified) llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (+7) 


``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 78ac57e3e92a6..2d72f8757d7c0 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -3619,6 +3619,13 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
     if (Reg == BasePointerReg)
       SavedRegs.set(Reg);
 
+    // Don't save fixed registers specified with -ffixed-reg.
+    if (AArch64::GPR64RegClass.contains(Reg) &&
+        RegInfo->isReservedReg(MF, Reg)) {
+      SavedRegs.reset(Reg);
+      continue;
+    }
+
     bool RegUsed = SavedRegs.test(Reg);
     unsigned PairedReg = AArch64::NoRegister;
     const bool RegIsGPR64 = AArch64::GPR64RegClass.contains(Reg);

``````````

</details>


https://github.com/llvm/llvm-project/pull/138448