[llvm] Register assembly printer passes (PR #138348)
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Fri May 2 15:11:48 PDT 2025
https://github.com/MatzeB updated https://github.com/llvm/llvm-project/pull/138348
>From e288df61f03ca8092c1e3b3496105b9d823f019f Mon Sep 17 00:00:00 2001
From: Matthias Braun <matze at braunis.de>
Date: Fri, 2 May 2025 14:07:19 -0700
Subject: [PATCH 1/2] Register assembly printer passes
---
llvm/include/llvm/CodeGen/AsmPrinter.h | 3 ++-
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 3 ++-
llvm/lib/Target/AArch64/AArch64.h | 1 +
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 11 +++++++++--
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 1 +
llvm/lib/Target/X86/X86.h | 1 +
llvm/lib/Target/X86/X86AsmPrinter.cpp | 8 +++++++-
llvm/lib/Target/X86/X86AsmPrinter.h | 4 ++++
llvm/lib/Target/X86/X86TargetMachine.cpp | 1 +
llvm/test/CodeGen/X86/align-basic-block-sections.mir | 2 +-
.../CodeGen/X86/basic-block-address-map-mir-parse.mir | 2 +-
.../CodeGen/X86/basic-block-sections-mir-parse.mir | 2 +-
llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir | 2 +-
llvm/test/DebugInfo/X86/single-location.mir | 2 +-
14 files changed, 33 insertions(+), 10 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h b/llvm/include/llvm/CodeGen/AsmPrinter.h
index 79d23986f3b43..9132a0a6ea5a3 100644
--- a/llvm/include/llvm/CodeGen/AsmPrinter.h
+++ b/llvm/include/llvm/CodeGen/AsmPrinter.h
@@ -240,7 +240,8 @@ class AsmPrinter : public MachineFunctionPass {
bool DbgInfoAvailable = false;
protected:
- explicit AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer);
+ AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer,
+ char &ID = AsmPrinter::ID);
public:
~AsmPrinter() override;
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index bdcd54a135da9..d7710212e8cc3 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -382,7 +382,8 @@ Align AsmPrinter::getGVAlignment(const GlobalObject *GV, const DataLayout &DL,
return Alignment;
}
-AsmPrinter::AsmPrinter(TargetMachine &tm, std::unique_ptr<MCStreamer> Streamer)
+AsmPrinter::AsmPrinter(TargetMachine &tm, std::unique_ptr<MCStreamer> Streamer,
+ char &ID)
: MachineFunctionPass(ID), TM(tm), MAI(tm.getMCAsmInfo()),
OutContext(Streamer->getContext()), OutStreamer(std::move(Streamer)),
SM(*this) {
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index ffa578d412b3c..a5bb7520aec0d 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -77,6 +77,7 @@ ModulePass *createAArch64Arm64ECCallLoweringPass();
void initializeAArch64A53Fix835769Pass(PassRegistry&);
void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
+void initializeAArch64AsmPrinterPass(PassRegistry&);
void initializeAArch64PointerAuthPass(PassRegistry&);
void initializeAArch64BranchTargetsPass(PassRegistry&);
void initializeAArch64CFIFixupPass(PassRegistry&);
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index 870df4c387ca4..38be677ec805b 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -96,9 +96,11 @@ class AArch64AsmPrinter : public AsmPrinter {
SectionToImportedFunctionCalls;
public:
+ static char ID;
+
AArch64AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
- : AsmPrinter(TM, std::move(Streamer)), MCInstLowering(OutContext, *this),
- FM(*this) {}
+ : AsmPrinter(TM, std::move(Streamer), ID),
+ MCInstLowering(OutContext, *this), FM(*this) {}
StringRef getPassName() const override { return "AArch64 Assembly Printer"; }
@@ -3523,6 +3525,11 @@ const MCExpr *AArch64AsmPrinter::lowerConstant(const Constant *CV,
return AsmPrinter::lowerConstant(CV, BaseCV, Offset);
}
+char AArch64AsmPrinter::ID = 0;
+
+INITIALIZE_PASS(AArch64AsmPrinter, "aarch64-asm-printer",
+ "AArch64 Assmebly Printer", false, false)
+
// Force static initialization.
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64AsmPrinter() {
RegisterAsmPrinter<AArch64AsmPrinter> X(getTheAArch64leTarget());
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 431076f188d98..5693a551e679f 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -235,6 +235,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() {
initializeAArch64A53Fix835769Pass(PR);
initializeAArch64A57FPLoadBalancingPass(PR);
initializeAArch64AdvSIMDScalarPass(PR);
+ initializeAArch64AsmPrinterPass(PR);
initializeAArch64BranchTargetsPass(PR);
initializeAArch64CollectLOHPass(PR);
initializeAArch64CompressJumpTablesPass(PR);
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index e6c0612101bc7..ba53ffd857fb3 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -176,6 +176,7 @@ void initializeFPSPass(PassRegistry &);
void initializeFixupBWInstPassPass(PassRegistry &);
void initializeFixupLEAPassPass(PassRegistry &);
void initializeX86ArgumentStackSlotPassPass(PassRegistry &);
+void initializeX86AsmPrinterPass(PassRegistry &);
void initializeX86FixupInstTuningPassPass(PassRegistry &);
void initializeX86FixupVectorConstantsPassPass(PassRegistry &);
void initializeWinEHStatePassPass(PassRegistry &);
diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp
index 29ec14e8cf46d..5f5bfc70e8a1a 100644
--- a/llvm/lib/Target/X86/X86AsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp
@@ -17,6 +17,7 @@
#include "MCTargetDesc/X86MCTargetDesc.h"
#include "MCTargetDesc/X86TargetStreamer.h"
#include "TargetInfo/X86TargetInfo.h"
+#include "X86.h"
#include "X86InstrInfo.h"
#include "X86MachineFunctionInfo.h"
#include "X86Subtarget.h"
@@ -53,7 +54,7 @@ using namespace llvm;
X86AsmPrinter::X86AsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer)
- : AsmPrinter(TM, std::move(Streamer)), FM(*this) {}
+ : AsmPrinter(TM, std::move(Streamer), ID), FM(*this) {}
//===----------------------------------------------------------------------===//
// Primitive Helper Functions.
@@ -1086,6 +1087,11 @@ void X86AsmPrinter::emitEndOfAsmFile(Module &M) {
}
}
+char X86AsmPrinter::ID = 0;
+
+INITIALIZE_PASS(X86AsmPrinter, "x86-asm-printer", "X86 Assembly Printer", false,
+ false)
+
//===----------------------------------------------------------------------===//
// Target Registry Stuff
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/X86/X86AsmPrinter.h b/llvm/lib/Target/X86/X86AsmPrinter.h
index 8dd7fa4431680..61d8f45501ab1 100644
--- a/llvm/lib/Target/X86/X86AsmPrinter.h
+++ b/llvm/lib/Target/X86/X86AsmPrinter.h
@@ -25,6 +25,10 @@ class X86Subtarget;
class TargetMachine;
class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public AsmPrinter {
+public:
+ static char ID;
+
+private:
const X86Subtarget *Subtarget = nullptr;
FaultMaps FM;
std::unique_ptr<MCCodeEmitter> CodeEmitter;
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 975b94c18fb7f..5fff9c30205dd 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -102,6 +102,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() {
initializeX86ReturnThunksPass(PR);
initializeX86DAGToDAGISelLegacyPass(PR);
initializeX86ArgumentStackSlotPassPass(PR);
+ initializeX86AsmPrinterPass(PR);
initializeX86FixupInstTuningPassPass(PR);
initializeX86FixupVectorConstantsPassPass(PR);
initializeX86DynAllocaExpanderPass(PR);
diff --git a/llvm/test/CodeGen/X86/align-basic-block-sections.mir b/llvm/test/CodeGen/X86/align-basic-block-sections.mir
index 17a675f5c5b72..02ccbcf0c0897 100644
--- a/llvm/test/CodeGen/X86/align-basic-block-sections.mir
+++ b/llvm/test/CodeGen/X86/align-basic-block-sections.mir
@@ -1,5 +1,5 @@
# Check if the alignment directive is put on the correct place when the basic block section option is used.
-# RUN: llc -mtriple x86_64-unknown-linux-gnu -start-after=bbsections-prepare %s -o - | FileCheck %s -check-prefix=CHECK
+# RUN: llc -mtriple x86_64-unknown-linux-gnu -start-before=x86-asm-printer %s -o - | FileCheck %s -check-prefix=CHECK
# How to generate the input:
# foo.c
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir b/llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir
index 8ac93c79fa5a2..a49a4e2726021 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir
@@ -1,5 +1,5 @@
# Start after bbsections0-prepare and check that the BB address map is generated.
-# RUN: llc -mtriple x86_64-unknown-linux-gnu -start-after=bbsections-prepare -basic-block-address-map %s -o - | FileCheck %s -check-prefix=CHECK
+# RUN: llc -mtriple x86_64-unknown-linux-gnu -start-before=x86-asm-printer -basic-block-address-map %s -o - | FileCheck %s -check-prefix=CHECK
# How to generate the input:
# foo.cc
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir b/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
index 967622a11cd2b..e49ff140935a3 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
+++ b/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
@@ -1,5 +1,5 @@
# Start after bbsections0-prepare and check if the right code is generated.
-# RUN: llc -mtriple x86_64-unknown-linux-gnu -start-after=bbsections-prepare %s -o - | FileCheck %s -check-prefix=CHECK
+# RUN: llc -mtriple x86_64-unknown-linux-gnu -start-before=x86-asm-printer %s -o - | FileCheck %s -check-prefix=CHECK
# How to generate the input:
diff --git a/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir b/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
index c245684f1fca8..b248ee76a4141 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after=livedebugvalues -filetype=obj -o - %s \
+# RUN: llc -start-before=aarch64-asm-printer -filetype=obj -o - %s \
# RUN: | llvm-dwarfdump - | FileCheck %s
# CHECK: .debug_info contents:
# CHECK: DW_TAG_formal_parameter
diff --git a/llvm/test/DebugInfo/X86/single-location.mir b/llvm/test/DebugInfo/X86/single-location.mir
index 79049e31f3710..a1a167eda628b 100644
--- a/llvm/test/DebugInfo/X86/single-location.mir
+++ b/llvm/test/DebugInfo/X86/single-location.mir
@@ -1,4 +1,4 @@
-# RUN: llc -start-after=livedebugvalues --filetype=obj %s -o - \
+# RUN: llc -start-before=x86-asm-printer --filetype=obj %s -o - \
# RUN: | llvm-dwarfdump -v - | FileCheck %s
#
# Generated at -O2, stopped after livedebugvalues, with some metadata removed
>From aa52b732071c52d8032a1e304b4e88d65e017b50 Mon Sep 17 00:00:00 2001
From: Matthias Braun <matze at braunis.de>
Date: Fri, 2 May 2025 14:28:59 -0700
Subject: [PATCH 2/2] Add some more tests and targets
---
llvm/lib/Target/AArch64/AArch64.h | 2 +-
llvm/lib/Target/AMDGPU/AMDGPU.h | 2 ++
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 5 +++++
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 3 +++
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 +
llvm/lib/Target/RISCV/RISCV.h | 2 ++
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 11 ++++++++++-
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 1 +
llvm/lib/Target/WebAssembly/WebAssembly.h | 1 +
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 6 ++++++
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h | 8 ++++++--
.../Target/WebAssembly/WebAssemblyTargetMachine.cpp | 1 +
llvm/test/CodeGen/AMDGPU/asm-printer-check-vcc.mir | 2 +-
llvm/test/CodeGen/RISCV/instruction-count-remark.mir | 2 +-
.../DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir | 2 +-
.../MIR/AArch64/dbgcall-site-expr-entry-value.mir | 2 +-
.../DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir | 2 +-
.../DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir | 2 +-
.../MIR/AArch64/no-dbg-value-after-terminator.mir | 2 +-
.../MIR/AArch64/subreg-fragment-overflow.mir | 2 +-
20 files changed, 47 insertions(+), 12 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index a5bb7520aec0d..5496ebd495a55 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -77,7 +77,7 @@ ModulePass *createAArch64Arm64ECCallLoweringPass();
void initializeAArch64A53Fix835769Pass(PassRegistry&);
void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
-void initializeAArch64AsmPrinterPass(PassRegistry&);
+void initializeAArch64AsmPrinterPass(PassRegistry &);
void initializeAArch64PointerAuthPass(PassRegistry&);
void initializeAArch64BranchTargetsPass(PassRegistry&);
void initializeAArch64CFIFixupPass(PassRegistry&);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index bbdc8c684e619..b572f81defe2d 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -95,6 +95,8 @@ void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &);
void initializeAMDGPUAlwaysInlinePass(PassRegistry&);
+void initializeAMDGPUAsmPrinterPass(PassRegistry &);
+
Pass *createAMDGPUAttributorLegacyPass();
void initializeAMDGPUAttributorLegacyPass(PassRegistry &);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 800e2b9c0e657..1c81f8884a75c 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -1743,3 +1743,8 @@ void AMDGPUAsmPrinter::emitResourceUsageRemarks(
EmitResourceUsageRemark("BytesLDS", "LDS Size [bytes/block]",
CurrentProgramInfo.LDSSize);
}
+
+char AMDGPUAsmPrinter::ID = 0;
+
+INITIALIZE_PASS(AMDGPUAsmPrinter, "amdgpu-asm-printer",
+ "AMDGPU Assembly Printer", false, false)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
index 4183bb6a76b6e..23779047efa40 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
@@ -36,6 +36,9 @@ class MetadataStreamer;
} // namespace AMDGPU
class AMDGPUAsmPrinter final : public AsmPrinter {
+public:
+ static char ID;
+
private:
unsigned CodeObjectVersion;
void initializeTargetID(const Module &M);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 43e837d9ab7e6..c22b27abdbf6c 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -495,6 +495,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
initializeR600EmitClauseMarkersPass(*PR);
initializeR600MachineCFGStructurizerPass(*PR);
initializeGlobalISel(*PR);
+ initializeAMDGPUAsmPrinterPass(*PR);
initializeAMDGPUDAGToDAGISelLegacyPass(*PR);
initializeGCNDPPCombineLegacyPass(*PR);
initializeSILowerI1CopiesLegacyPass(*PR);
diff --git a/llvm/lib/Target/RISCV/RISCV.h b/llvm/lib/Target/RISCV/RISCV.h
index 06de86269c8a9..ae9410193efe1 100644
--- a/llvm/lib/Target/RISCV/RISCV.h
+++ b/llvm/lib/Target/RISCV/RISCV.h
@@ -116,6 +116,8 @@ void initializeRISCVVLOptimizerPass(PassRegistry &);
FunctionPass *createRISCVVMV0EliminationPass();
void initializeRISCVVMV0EliminationPass(PassRegistry &);
+
+void initializeRISCVAsmPrinterPass(PassRegistry &);
} // namespace llvm
#endif
diff --git a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
index 7249eca22671a..e40bd184ddc38 100644
--- a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -55,12 +55,16 @@ extern const SubtargetFeatureKV RISCVFeatureKV[RISCV::NumSubtargetFeatures];
namespace {
class RISCVAsmPrinter : public AsmPrinter {
+public:
+ static char ID;
+
+private:
const RISCVSubtarget *STI;
public:
explicit RISCVAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer)
- : AsmPrinter(TM, std::move(Streamer)) {}
+ : AsmPrinter(TM, std::move(Streamer), ID) {}
StringRef getPassName() const override { return "RISC-V Assembly Printer"; }
@@ -1210,3 +1214,8 @@ void RISCVAsmPrinter::emitMachineConstantPoolValue(
uint64_t Size = getDataLayout().getTypeAllocSize(RCPV->getType());
OutStreamer->emitValue(Expr, Size);
}
+
+char RISCVAsmPrinter::ID = 0;
+
+INITIALIZE_PASS(RISCVAsmPrinter, "riscv-asm-printer", "RISC-V Assembly Printer",
+ false, false)
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index 315b504399a45..d11ce46bf78b5 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -149,6 +149,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
initializeRISCVLoadStoreOptPass(*PR);
initializeRISCVExpandAtomicPseudoPass(*PR);
initializeRISCVRedundantCopyEliminationPass(*PR);
+ initializeRISCVAsmPrinterPass(*PR);
}
static StringRef computeDataLayout(const Triple &TT,
diff --git a/llvm/lib/Target/WebAssembly/WebAssembly.h b/llvm/lib/Target/WebAssembly/WebAssembly.h
index 8f142fa0928ca..17481d77c120a 100644
--- a/llvm/lib/Target/WebAssembly/WebAssembly.h
+++ b/llvm/lib/Target/WebAssembly/WebAssembly.h
@@ -64,6 +64,7 @@ void initializeOptimizeReturnedPass(PassRegistry &);
void initializeWebAssemblyRefTypeMem2LocalPass(PassRegistry &);
void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &);
void initializeWebAssemblyArgumentMovePass(PassRegistry &);
+void initializeWebAssemblyAsmPrinterPass(PassRegistry &);
void initializeWebAssemblyCleanCodeAfterTrapPass(PassRegistry &);
void initializeWebAssemblyCFGSortPass(PassRegistry &);
void initializeWebAssemblyCFGStackifyPass(PassRegistry &);
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
index 22803ff89d060..c61ed3c7d5d81 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
@@ -19,6 +19,7 @@
#include "MCTargetDesc/WebAssemblyTargetStreamer.h"
#include "TargetInfo/WebAssemblyTargetInfo.h"
#include "Utils/WebAssemblyTypeUtilities.h"
+#include "WebAssembly.h"
#include "WebAssemblyMCInstLower.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblyRegisterInfo.h"
@@ -752,6 +753,11 @@ bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, ExtraCode, OS);
}
+char WebAssemblyAsmPrinter::ID = 0;
+
+INITIALIZE_PASS(WebAssemblyAsmPrinter, "webassembly-asm-printer",
+ "WebAssembly Assmebly Printer", false, false)
+
// Force static initialization.
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyAsmPrinter() {
RegisterAsmPrinter<WebAssemblyAsmPrinter> X(getTheWebAssemblyTarget32());
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h
index 6a544abe6ce83..46063bbe0fba1 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h
@@ -19,6 +19,10 @@ namespace llvm {
class WebAssemblyTargetStreamer;
class LLVM_LIBRARY_VISIBILITY WebAssemblyAsmPrinter final : public AsmPrinter {
+public:
+ static char ID;
+
+private:
const WebAssemblySubtarget *Subtarget;
const MachineRegisterInfo *MRI;
WebAssemblyFunctionInfo *MFI;
@@ -27,8 +31,8 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyAsmPrinter final : public AsmPrinter {
public:
explicit WebAssemblyAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer)
- : AsmPrinter(TM, std::move(Streamer)), Subtarget(nullptr), MRI(nullptr),
- MFI(nullptr) {}
+ : AsmPrinter(TM, std::move(Streamer), ID), Subtarget(nullptr),
+ MRI(nullptr), MFI(nullptr) {}
StringRef getPassName() const override {
return "WebAssembly Assembly Printer";
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index 873d2c59dc18c..892ecbbfa96db 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -69,6 +69,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() {
initializeOptimizeReturnedPass(PR);
initializeWebAssemblyRefTypeMem2LocalPass(PR);
initializeWebAssemblyArgumentMovePass(PR);
+ initializeWebAssemblyAsmPrinterPass(PR);
initializeWebAssemblySetP2AlignOperandsPass(PR);
initializeWebAssemblyReplacePhysRegsPass(PR);
initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
diff --git a/llvm/test/CodeGen/AMDGPU/asm-printer-check-vcc.mir b/llvm/test/CodeGen/AMDGPU/asm-printer-check-vcc.mir
index c589c10c1da1d..813b2238e5446 100644
--- a/llvm/test/CodeGen/AMDGPU/asm-printer-check-vcc.mir
+++ b/llvm/test/CodeGen/AMDGPU/asm-printer-check-vcc.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -start-after=livedebugvalues -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -start-before=amdgpu-asm-printer -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
# GCN-LABEL: foo:
# GCN: s_getpc_b64 vcc
diff --git a/llvm/test/CodeGen/RISCV/instruction-count-remark.mir b/llvm/test/CodeGen/RISCV/instruction-count-remark.mir
index 4f429ab5274e8..f39a6ea6424f3 100644
--- a/llvm/test/CodeGen/RISCV/instruction-count-remark.mir
+++ b/llvm/test/CodeGen/RISCV/instruction-count-remark.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=riscv32 -verify-machineinstrs -start-before=riscv-expand-pseudo -simplify-mir -o /dev/null -pass-remarks-analysis=asm-printer %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=riscv32 -verify-machineinstrs -start-before=riscv-asm-printer -simplify-mir -o /dev/null -pass-remarks-analysis=asm-printer %s 2>&1 | FileCheck %s
---
name: instrs
tracksRegLiveness: true
diff --git a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
index 02f4ce1200ca1..0f949f4d7eea8 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple aarch64-linux-gnu -emit-call-site-info -debug-entry-values -start-after=livedebugvalues -filetype=obj -o - %s \
+# RUN: llc -mtriple aarch64-linux-gnu -emit-call-site-info -debug-entry-values -start-before=aarch64-asm-printer -filetype=obj -o - %s \
# RUN: | llvm-dwarfdump - | FileCheck %s --implicit-check-not=DW_TAG_GNU_call_site_parameter
#
# Based on the following C reproducer:
diff --git a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-entry-value.mir b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-entry-value.mir
index 6c8912302c4cd..d7740e0e59db1 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-entry-value.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-entry-value.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple aarch64-linux-gnu -emit-call-site-info -debug-entry-values -start-after=livedebugvalues -filetype=obj -o - %s \
+# RUN: llc -mtriple aarch64-linux-gnu -emit-call-site-info -debug-entry-values -start-before=aarch64-asm-printer -filetype=obj -o - %s \
# RUN: | llvm-dwarfdump - | FileCheck %s --implicit-check-not=DW_TAG_GNU_call_site_parameter
#
# Based on the following C reproducer:
diff --git a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
index 389121914ba8b..bf04b20171415 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
@@ -1,4 +1,4 @@
-# RUN: llc -emit-call-site-info -start-after=livedebugvalues -filetype=obj -o - %s | llvm-dwarfdump - | FileCheck %s
+# RUN: llc -emit-call-site-info -start-before=aarch64-asm-printer -filetype=obj -o - %s | llvm-dwarfdump - | FileCheck %s
# Based on the following C reproducer:
#
diff --git a/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir b/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
index 1479b3728ad0e..113a0035fe7f6 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
@@ -1,4 +1,4 @@
-# RUN: llc -emit-call-site-info -start-after=livedebugvalues -filetype=obj -o - %s \
+# RUN: llc -emit-call-site-info -start-before=aarch64-asm-printer -filetype=obj -o - %s \
# RUN: | llvm-dwarfdump -v - | FileCheck %s
# This tests for a crash in DwarfDebug's singular DBG_VALUE range promotion when
diff --git a/llvm/test/DebugInfo/MIR/AArch64/no-dbg-value-after-terminator.mir b/llvm/test/DebugInfo/MIR/AArch64/no-dbg-value-after-terminator.mir
index 22e96681f23d9..34c099f27becb 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/no-dbg-value-after-terminator.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/no-dbg-value-after-terminator.mir
@@ -1,4 +1,4 @@
-# RUN: not --crash llc -mtriple aarch64-linux-gnu -verify-machineinstrs -start-after=livedebugvalues \
+# RUN: not --crash llc -mtriple aarch64-linux-gnu -verify-machineinstrs -start-before=aarch64-asm-printer \
# RUN: -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: Non-terminator instruction after the first terminator ***
diff --git a/llvm/test/DebugInfo/MIR/AArch64/subreg-fragment-overflow.mir b/llvm/test/DebugInfo/MIR/AArch64/subreg-fragment-overflow.mir
index d0b138429d964..19a90b654abd2 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/subreg-fragment-overflow.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/subreg-fragment-overflow.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple aarch64-linux-gnu -start-after=livedebugvalues -filetype=obj -o - %s \
+# RUN: llc -mtriple aarch64-linux-gnu -start-before=aarch64-asm-printer -filetype=obj -o - %s \
# RUN: | llvm-dwarfdump - | FileCheck %s
# The value needs to be composed of sub-registers, but the
# sub-registers cross the fragment boundary.
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