[llvm] [AMDGPU][True16][CodeGen] readfirstlane for vgpr16 copy to sgpr32 (PR #118037)

[Joe Nash via llvm-commits]

https://github.com/Sisyph commented:

Thanks for adding the IR test, it helps a lot. I would describe the situation as moving a uniform 16 bit value in a VGPR into an SGPR, when we don't have a readfirstlane_b16 instruction or a 16 bit SGPR. LGTM, but please wait for @arsenm.

https://github.com/llvm/llvm-project/pull/118037