[llvm] [llvm] Remove redundant control flow (NFC) (PR #138304)

[Kazu Hirata via llvm-commits]

https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/138304

None

>From 2f75d5dba2bbf75572315701d7a793ffa6f40283 Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Thu, 4 Jul 2024 02:31:21 -0700
Subject: [PATCH] [llvm] Remove redundant control flow (NFC)

---
 llvm/lib/Analysis/KernelInfo.cpp                | 2 --
 llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp    | 5 ++---
 llvm/lib/CodeGen/PeepholeOptimizer.cpp          | 2 +-
 llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp      | 3 ---
 llvm/lib/IR/ConvergenceVerifier.cpp             | 4 +---
 llvm/lib/Support/Mustache.cpp                   | 1 -
 llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp     | 1 -
 llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp | 2 --
 llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 1 -
 9 files changed, 4 insertions(+), 17 deletions(-)

diff --git a/llvm/lib/Analysis/KernelInfo.cpp b/llvm/lib/Analysis/KernelInfo.cpp
index 9c8f8699401ce..93dd7cecb32e1 100644
--- a/llvm/lib/Analysis/KernelInfo.cpp
+++ b/llvm/lib/Analysis/KernelInfo.cpp
@@ -313,8 +313,6 @@ void KernelInfo::emitKernelInfo(Function &F, FunctionAnalysisManager &FAM,
   REMARK_PROPERTY(Invokes);
   REMARK_PROPERTY(FlatAddrspaceAccesses);
 #undef REMARK_PROPERTY
-
-  return;
 }
 
 PreservedAnalyses KernelInfoPrinter::run(Function &F,
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index a4069ad896a92..908524313030f 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -3597,9 +3597,8 @@ void IRTranslator::translateDbgDeclareRecord(Value *Address, bool HasArgList,
   // A dbg.declare describes the address of a source variable, so lower it
   // into an indirect DBG_VALUE.
   MIRBuilder.setDebugLoc(DL);
-  MIRBuilder.buildIndirectDbgValue(getOrCreateVReg(*Address),
-                                   Variable, Expression);
-  return;
+  MIRBuilder.buildIndirectDbgValue(getOrCreateVReg(*Address), Variable,
+                                   Expression);
 }
 
 void IRTranslator::translateDbgInfo(const Instruction &Inst,
diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
index 6f44837c5441c..27b22e68d919e 100644
--- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -521,7 +521,7 @@ class PeepholeOptimizer : private MachineFunction::Delegate {
   DenseMap<RegSubRegPair, MachineInstr *> CopySrcMIs;
 
   // MachineFunction::Delegate implementation. Used to maintain CopySrcMIs.
-  void MF_HandleInsertion(MachineInstr &MI) override { return; }
+  void MF_HandleInsertion(MachineInstr &MI) override {}
 
   bool getCopySrc(MachineInstr &MI, RegSubRegPair &SrcPair) {
     if (!MI.isCopy())
diff --git a/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp b/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
index 690a2e5fee9de..49db94fff78aa 100644
--- a/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
+++ b/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
@@ -1389,7 +1389,6 @@ void DWARFVerifier::verifyNameIndexBuckets(const DWARFDebugNames::NameIndex &NI,
     }
     NextUncovered = std::max(NextUncovered, Idx);
   }
-  return;
 }
 
 void DWARFVerifier::verifyNameIndexAttribute(
@@ -1469,7 +1468,6 @@ void DWARFVerifier::verifyNameIndexAttribute(
     });
     return;
   }
-  return;
 }
 
 void DWARFVerifier::verifyNameIndexAbbrevs(
@@ -2068,7 +2066,6 @@ void DWARFVerifier::verifyDebugNames(const DWARFSection &AccelSection,
       }
     }
   }
-  return;
 }
 
 bool DWARFVerifier::handleAccelTables() {
diff --git a/llvm/lib/IR/ConvergenceVerifier.cpp b/llvm/lib/IR/ConvergenceVerifier.cpp
index 6708f85819df7..6fa6f83685da2 100644
--- a/llvm/lib/IR/ConvergenceVerifier.cpp
+++ b/llvm/lib/IR/ConvergenceVerifier.cpp
@@ -34,9 +34,7 @@ auto GenericConvergenceVerifier<SSAContext>::getConvOp(const Instruction &I)
 
 template <>
 void GenericConvergenceVerifier<SSAContext>::checkConvergenceTokenProduced(
-    const Instruction &I) {
-  return;
-}
+    const Instruction &I) {}
 
 template <>
 const Instruction *
diff --git a/llvm/lib/Support/Mustache.cpp b/llvm/lib/Support/Mustache.cpp
index 2560619538f9a..2554eba74301e 100644
--- a/llvm/lib/Support/Mustache.cpp
+++ b/llvm/lib/Support/Mustache.cpp
@@ -707,7 +707,6 @@ void ASTNode::renderSectionLambdas(const json::Value &Contexts,
   Parser P = Parser(LambdaStr);
   AstPtr LambdaNode = P.parse(Partials, Lambdas, SectionLambdas, Escapes);
   LambdaNode->render(Contexts, OS);
-  return;
 }
 
 void Template::render(const json::Value &Data, llvm::raw_ostream &OS) {
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index 44bfd303fc861..37882de7b3046 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -5902,7 +5902,6 @@ static void ReplaceTcgen05Ld(SDNode *N, SelectionDAG &DAG,
   SDValue BuildVector = DAG.getNode(ISD::BUILD_VECTOR, DL, ResVT, ScalarRes);
   Results.push_back(BuildVector); // Build Vector
   Results.push_back(Chain);       // Chain
-  return;
 }
 
 static void ReplaceINTRINSIC_W_CHAIN(SDNode *N, SelectionDAG &DAG,
diff --git a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
index 965a88640aec4..65c7b9aafe7d4 100644
--- a/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
@@ -357,8 +357,6 @@ static void lowerExpectAssume(IntrinsicInst *II) {
   } else {
     llvm_unreachable("Unknown intrinsic");
   }
-
-  return;
 }
 
 static bool toSpvOverloadedIntrinsic(IntrinsicInst *II, Intrinsic::ID NewID,
diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index 04c084ffdda97..e58789b5d5641 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -1295,7 +1295,6 @@ static void analyzeCostOfVecReduction(const IntrinsicInst &II,
   }
   CostAfterReduction = TTI.getArithmeticReductionCost(ReductionOpc, VecRedTy,
                                                       std::nullopt, CostKind);
-  return;
 }
 
 bool VectorCombine::foldBinopOfReductions(Instruction &I) {