[llvm] [AMDGPU] SIPeepholeSDWA: Handle V_CNDMASK_B32_e64 (PR #137930)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,41 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=si-peephole-sdwa -mcpu=gfx803 -o - %s | FileCheck  -check-prefix=GFX8 %s
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=si-peephole-sdwa -mcpu=gfx1100 -o - %s | FileCheck -check-prefix=GFX11 %s
+
+---
+name: v_cndmask_b32_test
+tracksRegLiveness: true
+body: |
+  bb.0:
+    liveins: $vgpr0, $vgpr1, $vcc
+
+    ; GFX8-LABEL: name: v_cndmask_b32_test
+    ; GFX8: liveins: $vgpr0, $vgpr1, $vcc
+    ; GFX8-NEXT: {{  $}}
+    ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+    ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX8-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, [[COPY]], implicit $exec
+    ; GFX8-NEXT: [[V_LSHRREV_B32_e64_1:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, [[COPY1]], implicit $exec
+    ; GFX8-NEXT: [[V_CNDMASK_B32_sdwa:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_sdwa 0, [[COPY]], 0, [[COPY1]], 0, 6, 0, 5, 5, implicit $vcc, implicit $exec
+    ; GFX8-NEXT: $vgpr0 = COPY [[V_CNDMASK_B32_sdwa]]
+    ; GFX8-NEXT: SI_RETURN implicit $vgpr0
+    ;
+    ; GFX11-LABEL: name: v_cndmask_b32_test
+    ; GFX11: liveins: $vgpr0, $vgpr1, $vcc
+    ; GFX11-NEXT: {{  $}}
+    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GFX11-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, [[COPY]], implicit $exec
+    ; GFX11-NEXT: [[V_LSHRREV_B32_e64_1:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, [[COPY1]], implicit $exec
+    ; GFX11-NEXT: [[V_CNDMASK_B32_e32_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e32 killed [[V_LSHRREV_B32_e64_]], killed [[V_LSHRREV_B32_e64_1]], implicit $exec, implicit $vcc_lo
+    ; GFX11-NEXT: $vgpr0 = COPY [[V_CNDMASK_B32_e32_]]
+    ; GFX11-NEXT: SI_RETURN implicit $vgpr0
+    %1:vgpr_32 = COPY $vgpr1
----------------
arsenm wrote:

Compact register numbers, they start at 0 

https://github.com/llvm/llvm-project/pull/137930