[llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)

[Vikash Gupta via llvm-commits]

vg0204 wrote:

> Before we can switch the liveins representation to regunits I think we need a proper fix for https://github.com/llvm/llvm-project/issues/96146. Without that, regunits cannot distinguish AArch64 Qn and Dn registers, because there is no regunit corresponding to the not-directly-addressable high bits of those registers.

While investigating the current patch changes to use regunits, I found that RISCV also has registers which share exactly same sets of regUnits as same as AArch64 Qn & Dn :

For example : Both `x0` & `x0_w` has {`x0_h`} regUnits, where x0_w represents 16-bit registers, while x0 represents 32-bits. Thus no regUnit to point directly high bits in x0_w (which at hardware abstraction is non-existent)

CC : @jayfoad , @arsenm 

https://github.com/llvm/llvm-project/pull/129847