[llvm] 8b56fb7 - [X86] Check for AMXTile in asserting (#136507)

via llvm-commits llvm-commits at lists.llvm.org
Fri May 2 03:54:35 PDT 2025


Author: AZero13
Date: 2025-05-02T18:54:32+08:00
New Revision: 8b56fb7a705a368c691b203a430009342b440886

URL: https://github.com/llvm/llvm-project/commit/8b56fb7a705a368c691b203a430009342b440886
DIFF: https://github.com/llvm/llvm-project/commit/8b56fb7a705a368c691b203a430009342b440886.diff

LOG: [X86] Check for AMXTile in asserting (#136507)

Assert if hasAMXTILE is false.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86LowerTileCopy.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86LowerTileCopy.cpp b/llvm/lib/Target/X86/X86LowerTileCopy.cpp
index a4845c0b67efa..83b91b1d0ad10 100644
--- a/llvm/lib/Target/X86/X86LowerTileCopy.cpp
+++ b/llvm/lib/Target/X86/X86LowerTileCopy.cpp
@@ -75,6 +75,8 @@ bool X86LowerTileCopy::runOnMachineFunction(MachineFunction &MF) {
     return false;
 
   const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>();
+  assert(ST.hasAMXTILE() && "Only supported on AMXTILE targets");
+
   const X86InstrInfo *TII = ST.getInstrInfo();
   const TargetRegisterInfo *TRI = ST.getRegisterInfo();
   BitVector GR64Regs =


        


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