[llvm] [MISched] Fix off-by-one error in debug output with -misched-cutoff=<n> flag (PR #137988)

via llvm-commits llvm-commits at lists.llvm.org
Fri May 2 02:18:52 PDT 2025


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-aarch64

Author: Cullen Rhodes (c-rhodes)

<details>
<summary>Changes</summary>

This flag instructs the scheduler to stop scheduling after N instructions, but
in the debug output it appears as if it's scheduling N+1 instructions, e.g.

$ llc -misched-cutoff=10 -debug-only=machine-scheduler
example.ll 2>&1 | grep "^Scheduling SU" | wc -l
11

as it calls pickNode before calling checkSchedLimit.

---
Full diff: https://github.com/llvm/llvm-project/pull/137988.diff


2 Files Affected:

- (modified) llvm/lib/CodeGen/MachineScheduler.cpp (+6-4) 
- (added) llvm/test/CodeGen/AArch64/misched-cutoff.mir (+55) 


``````````diff
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 97f27277aface..77cf46178aabd 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -1003,13 +1003,14 @@ void ScheduleDAGMI::schedule() {
 
   bool IsTopNode = false;
   while (true) {
+    if (!checkSchedLimit())
+      break;
+
     LLVM_DEBUG(dbgs() << "** ScheduleDAGMI::schedule picking next node\n");
     SUnit *SU = SchedImpl->pickNode(IsTopNode);
     if (!SU) break;
 
     assert(!SU->isScheduled && "Node already scheduled");
-    if (!checkSchedLimit())
-      break;
 
     MachineInstr *MI = SU->getInstr();
     if (IsTopNode) {
@@ -1637,13 +1638,14 @@ void ScheduleDAGMILive::schedule() {
 
   bool IsTopNode = false;
   while (true) {
+    if (!checkSchedLimit())
+      break;
+
     LLVM_DEBUG(dbgs() << "** ScheduleDAGMILive::schedule picking next node\n");
     SUnit *SU = SchedImpl->pickNode(IsTopNode);
     if (!SU) break;
 
     assert(!SU->isScheduled && "Node already scheduled");
-    if (!checkSchedLimit())
-      break;
 
     scheduleMI(SU, IsTopNode);
 
diff --git a/llvm/test/CodeGen/AArch64/misched-cutoff.mir b/llvm/test/CodeGen/AArch64/misched-cutoff.mir
new file mode 100644
index 0000000000000..a61eb64318a39
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/misched-cutoff.mir
@@ -0,0 +1,55 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=aarch64 -passes=machine-scheduler -o - %s | FileCheck %s
+# RUN: llc -mtriple=aarch64 -passes=machine-scheduler -misched-cutoff=1 -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK-CUTOFF
+
+# REQUIRES: asserts
+
+# CHECK-CUTOFF-COUNT-1: Scheduling SU
+
+# NOTE: copied from machine-scheduler.mir
+
+--- |
+  define i64 @load_imp-def(ptr nocapture %P, i32 %v) {
+  entry:
+    %0 = bitcast ptr %P to ptr
+    %1 = load i32, ptr %0
+    %conv = zext i32 %1 to i64
+    %arrayidx19 = getelementptr inbounds i64, ptr %P, i64 1
+    %arrayidx1 = bitcast ptr %arrayidx19 to ptr
+    store i32 %v, ptr %arrayidx1
+    %2 = load i64, ptr %arrayidx19
+    %and = and i64 %2, 4294967295
+    %add = add nuw nsw i64 %and, %conv
+    ret i64 %add
+  }
+...
+---
+name: load_imp-def
+tracksRegLiveness: true
+body: |
+  bb.0.entry:
+    liveins: $w1, $x0
+    ; CHECK-LABEL: name: load_imp-def
+    ; CHECK: liveins: $w1, $x0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: $w8 = LDRWui $x0, 1, implicit-def $x8 :: (load (s32) from %ir.0)
+    ; CHECK-NEXT: $w9 = LDRWui $x0, 0, implicit-def $x9 :: (load (s32) from %ir.arrayidx19, align 8)
+    ; CHECK-NEXT: STRWui $w1, $x0, 2 :: (store (s32) into %ir.arrayidx1)
+    ; CHECK-NEXT: $x0 = ADDXrr killed $x9, killed $x8
+    ; CHECK-NEXT: RET_ReallyLR implicit $x0
+    ;
+    ; CHECK-CUTOFF-LABEL: name: load_imp-def
+    ; CHECK-CUTOFF: liveins: $w1, $x0
+    ; CHECK-CUTOFF-NEXT: {{  $}}
+    ; CHECK-CUTOFF-NEXT: $w8 = LDRWui $x0, 1, implicit-def $x8 :: (load (s32) from %ir.0)
+    ; CHECK-CUTOFF-NEXT: STRWui $w1, $x0, 2 :: (store (s32) into %ir.arrayidx1)
+    ; CHECK-CUTOFF-NEXT: $w9 = LDRWui $x0, 0, implicit-def $x9 :: (load (s32) from %ir.arrayidx19, align 8)
+    ; CHECK-CUTOFF-NEXT: $x0 = ADDXrr killed $x9, killed $x8
+    ; CHECK-CUTOFF-NEXT: RET_ReallyLR implicit $x0
+    $w8 = LDRWui $x0, 1, implicit-def $x8  :: (load (s32) from %ir.0)
+    STRWui killed $w1, $x0, 2 :: (store (s32) into %ir.arrayidx1)
+    $w9 = LDRWui killed $x0, 0, implicit-def $x9  :: (load (s32) from %ir.arrayidx19, align 8)
+    $x0 = ADDXrr killed $x9, killed $x8
+    RET_ReallyLR implicit $x0
+...
+

``````````

</details>


https://github.com/llvm/llvm-project/pull/137988


More information about the llvm-commits mailing list