[llvm] [AMDGPU] Remove implicit definition of register group when restoring the last sub-register after a spill (PR #133986)

[Ryan Buchner via llvm-commits]

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@@ -0,0 +1,43 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx942 -verify-machineinstrs -run-pass prologepilog,machine-cp -o - %s | FileCheck -check-prefix=GFX942 %s
+
+--- |
+  define amdgpu_kernel void @agpr_spill_copy() #0 { ret void }
+
+  attributes #0 = { "amdgpu-num-vgpr"="32" }
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bababuck wrote:

Isn't using `amdgpu-waves-per-eu` also not robust to if the number of registers change in the context of this test? Because I'm relying on the fact that there are 256 registers so with `amdgpu-waves-per-eu=8`, 32 registers are allocated for each wave, which is the condition I need for the failing case to occur. Is there a better way to write the test to avoid this dependency; my end goal is to have exactly 2 unused `agpr`'s when the register spill occurs.

https://github.com/llvm/llvm-project/pull/133986