[llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu May 1 09:37:08 PDT 2025


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@@ -1422,3 +1423,31 @@ void GCNTTIImpl::collectKernelLaunchBounds(
   LB.push_back({"amdgpu-waves-per-eu[0]", WavesPerEU.first});
   LB.push_back({"amdgpu-waves-per-eu[1]", WavesPerEU.second});
 }
+
+InstructionCost GCNTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
+                                            Align Alignment,
+                                            unsigned AddressSpace,
+                                            TTI::TargetCostKind CostKind,
+                                            TTI::OperandValueInfo OpInfo,
+                                            const Instruction *I) const {
+  if (VectorType *VecTy = dyn_cast<VectorType>(Src))
+    if ((Opcode == Instruction::Load || Opcode == Instruction::Store) &&
+        VecTy->getElementType() ==
+            IntegerType::getInt8Ty(VecTy->getContext())) {
+      return ((DL.getTypeSizeInBits(VecTy) - 1) /
+              getLoadStoreVecRegBitWidth(AddressSpace)) +
+             1;
+    }
+  return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, CostKind,
+                                OpInfo, I);
+}
+
+unsigned GCNTTIImpl::getNumberOfParts(Type *Tp) const {
+  if (VectorType *VecTy = dyn_cast<VectorType>(Tp))
----------------
arsenm wrote:

Braces 

https://github.com/llvm/llvm-project/pull/134934


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