[llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)

[Craig Topper via llvm-commits]

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@@ -3210,15 +3210,15 @@ class TargetLoweringBase {
     return false;
   }
 
-  /// Lower an interleaved load to target specific intrinsics. Return
+  /// Lower a deinterleaved load to target specific intrinsics. Return
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topperc wrote:

I think this should still be "interleaved load" to match the terminology used in the header description at the top of InterleavedAccessPass.cpp and the loop vectorizer.

https://github.com/llvm/llvm-project/pull/135445