[llvm] [DataLayout] Introduce DataLayout::getPointerAddressSize(AS) (PR #137412)

[Krzysztof Drewniak via llvm-commits]

================
@@ -3147,14 +3147,20 @@ as follows:
 ``A<address space>``
     Specifies the address space of objects created by '``alloca``'.
     Defaults to the default address space of 0.
-``p[n]:<size>:<abi>[:<pref>][:<idx>]``
+``p[n]:<size>:<abi>[:<pref>[:<idx>[:<addr>]]]``
     This specifies the *size* of a pointer and its ``<abi>`` and
     ``<pref>``\erred alignments for address space ``n``.
-    The fourth parameter ``<idx>`` is the size of the
-    index that used for address calculation, which must be less than or equal
-    to the pointer size. If not
-    specified, the default index size is equal to the pointer size. All sizes
-    are in bits. The address space, ``n``, is optional, and if not specified,
+    The fourth parameter ``<idx>`` is the size of the index that used for
+    address calculations such as :ref:`getelementptr <i_getelementptr>`.
+    It must be less than or equal to the pointer size. If not specified, the
+    default index size is equal to the pointer size.
+    The fifth parameter ``<addr>`` specifies the width of addresses in this
+    address space. If not specified, the default address size is equal to the
+    index size. The address size may be wider than the index size as it could be
+    calculated relative to a base address. For example AMDGPU buffer fat
+    pointers use a 48-bit address range, but only allow for 32 bits of indexing.
----------------
krzysz00 wrote:

... Isn't that the AMDGPU stack pointer in some of its implementations, even though you're not supposed to think of it like that? (Opinions have varied over the generations on if it's "32-bit offset from buffer resource the compiler creates" to "32-bit offset from implicit scratch base" and so on)? Though I'd need more consensus from AMDGPU forks on if we ever want to expose the lie

https://github.com/llvm/llvm-project/pull/137412