[llvm] [HLSL] Implement DXILResourceBindingAnalysis (PR #137258)
Ashley Coleman via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 30 11:12:18 PDT 2025
================
@@ -586,6 +589,128 @@ class DXILResourceWrapperPass : public ModulePass {
ModulePass *createDXILResourceWrapperPassPass();
+//===----------------------------------------------------------------------===//
+
+// DXILResourceBindingInfo stores the results of DXILResourceBindingAnalysis
+// which analyses all llvm.dx.resource.handlefrombinding calls in the module
+// and puts together lists of used virtual register spaces and available
+// virtual register slot ranges for each binding type.
+// It also stores additional information found during the analysis such as
+// whether the module uses implicit bindings or if any of the bindings overlap.
+//
+// This information will be used in DXILResourceImplicitBindings pass to assign
+// register slots to resources with implicit bindings, and in a
+// post-optimization validation pass that will raise diagnostic about
+// overlapping bindings.
+//
+// For example for these resource bindings:
+//
+// RWBuffer<float> A[10] : register(u3);
+// RWBuffer<float> B[] : register(u5, space2)
+//
+// The analysis result for UAV binding type will look like this:
+//
+// UAVSpaces {
+// ResClass = ResourceClass::UAV,
+// Spaces = {
+// { Space = 0, FreeRanges = {{ 0, 2 }, { 13, UINT32_MAX }} },
+// { Space = 2, FreeRanges = {{ 0, 4 }} }
----------------
V-FEXrt wrote:
This one is missing `{6, UINT32_MAX}` right?
https://github.com/llvm/llvm-project/pull/137258
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