[llvm] [RISCV] Implement codegen for XAndesPerf lea instructions (PR #137925)

[Craig Topper via llvm-commits]

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@@ -659,30 +659,103 @@ def : Pat<(i32 (and GPR:$rs, 0xFFFF)), (PACK GPR:$rs, (XLenVT X0))>;
 let Predicates = [HasStdExtZbkb, NoStdExtZbb, IsRV64] in
 def : Pat<(i64 (and GPR:$rs, 0xFFFF)), (PACKW GPR:$rs, (XLenVT X0))>;
 
-let Predicates = [HasStdExtZba] in {
+multiclass ShxAddPat<int i, Instruction shxadd> {
+def : Pat<(XLenVT (add_like_non_imm12 (shl GPR:$rs1, (XLenVT i)), GPR:$rs2)),
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topperc wrote:

Ident the body of the multiclass by 2 spaces

https://github.com/llvm/llvm-project/pull/137925