[llvm] [AMDGPU] Fix register class constraints for si-fold-operands pass when folding immediate into copies (PR #131387)

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index dbbed2997..f1cbc26dc 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1068,8 +1068,8 @@ void SIFoldOperandsImpl::foldOperand(
       return;
 
     // Fold if the destination register class of the MOV instruction (ResRC)
-    // is a superclass of (or equal to) the destination register class of the COPY (DestRC).
-    // If this condition fails, folding would be illegal.
+    // is a superclass of (or equal to) the destination register class of the
+    // COPY (DestRC). If this condition fails, folding would be illegal.
     const MCInstrDesc &MovDesc = TII->get(MovOp);
     assert(MovDesc.getNumDefs() > 0 && MovDesc.operands()[0].RegClass != -1);
     const TargetRegisterClass *ResRC =

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https://github.com/llvm/llvm-project/pull/131387