[llvm] [TableGen][CallingConv] Add CCAssignToRegTuple for synthetic registers. (PR #137826)

[Rahul Joshi via llvm-commits]

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@@ -35,14 +37,20 @@ class CallingConvEmitter {
   std::map<std::string, std::set<std::string>> DelegateToMap;
 
 public:
-  explicit CallingConvEmitter(const RecordKeeper &R) : Records(R) {}
+  explicit CallingConvEmitter(const RecordKeeper &R) : Records(R), Target(R) {
+    for (const CodeGenRegister &Reg : Target.getRegBank().getRegisters())
+      RegistersByDefName.try_emplace(Reg.getName(), &Reg);
+  }
 
   void run(raw_ostream &O);
 
 private:
   void emitCallingConv(const Record *CC, raw_ostream &O);
   void emitAction(const Record *Action, indent Indent, raw_ostream &O);
   void emitArgRegisterLists(raw_ostream &O);
+
+  StringMap<const CodeGenRegister *> RegistersByDefName;
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jurahul wrote:

No, I think its slightly different. I understand that these synthetic records are not available at TableGen parsing time, so there is no way to reference them the standard way. However, once they are synthesized in `CodeGenRegBank` constructor, they could have been added back to the `RecordKeeper` by calling `RecordKeeper::addDef()` and then the 2- step lookup from Name -> Record -> CodeGenRegister * would have worked without needing an additional LUT. But in the absence of that, what this PR is doing seems reasonable.

https://github.com/llvm/llvm-project/pull/137826