[llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 30 05:41:12 PDT 2025
================
@@ -3641,6 +3641,54 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
foldAddLikeCommutative(I.getOperand(1), I.getOperand(0),
/*NSW=*/true, /*NUW=*/true))
return R;
+
+ Value *Cond0 = nullptr, *Cond1 = nullptr;
+ const APInt *Op0Eq = nullptr, *Op0Ne = nullptr;
+ const APInt *Op1Eq = nullptr, *Op1Ne = nullptr;
+
+ // (!(A & N) ? 0 : N * C) + (!(A & M) ? 0 : M * C) -> A & (N + M) * C
+ if (match(I.getOperand(0),
+ m_Select(m_Value(Cond0), m_APInt(Op0Eq), m_APInt(Op0Ne))) &&
+ match(I.getOperand(1),
+ m_Select(m_Value(Cond1), m_APInt(Op1Eq), m_APInt(Op1Ne)))) {
+ CmpPredicate Pred0, Pred1;
+
+ auto LHSDecompose =
+ decomposeBitTest(Cond0, /*LookThruTrunc=*/true,
+ /*AllowNonZeroC=*/false, /*DecomposeAnd=*/true);
+ auto RHSDecompose =
+ decomposeBitTest(Cond1, /*LookThruTrunc=*/true,
+ /*AllowNonZeroC=*/false, /*DecomposeAnd=*/true);
+
+ if (LHSDecompose && RHSDecompose && LHSDecompose->X == RHSDecompose->X &&
+ (ICmpInst::isEquality(LHSDecompose->Pred)) &&
+ !RHSDecompose->Mask.isNegative() &&
+ !LHSDecompose->Mask.isNegative() && RHSDecompose->Mask.isPowerOf2() &&
----------------
dtcxzyw wrote:
```suggestion
RHSDecompose->Mask.isPowerOf2() &&
```
These constraints don't appear in the proof.
https://github.com/llvm/llvm-project/pull/135274
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